Standard Products
UT54ACS373/UT54ACTS373
Octal Transparent Latches with Three-State Outputs
Datasheet
November 2010
www.aeroflex.com/logic
PINOUTS
20-Pin DIP
Top View
FEATURES
8 latches in a single package
Three-state bus-driving true outputs
Full parallel access for loading
1.2μ CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 20-pin DIP
OC
1Q
1D
2D
2Q
1
2
3
4
5
20
19
18
17
16
VDD
8Q
8D
7D
7Q
3Q
3D
6
7
15
14
6Q
6D
4D
4Q
8
13
12
11
5D
5Q
C
9
VSS
10
- 20-lead flatpack
UT54ACS373 - SMD 5962-96588
UT54ACTS373 - SMD 5962-96589
20-Lead Flatpack
Top View
DESCRIPTION
The UT54ACS373 and the UT54ACTS373 are 8-bit latches
with three-state outputs designed for driving highly capacitive
or relatively low-impedance loads. The device is suitable for
buffer registers, I/O ports, and bidirectional bus drivers.
OC
1
20
VDD
1Q
1D
2D
2Q
3Q
3D
4D
4Q
VSS
2
3
19
18
17
16
15
14
13
12
11
8Q
8D
7D
7Q
6Q
6D
5D
5Q
C
4
5
The eight latches are transparent D latches. While the enable
(C) is high the Q outputs will follow the data (D) inputs. When
the enable is taken low, the Q outputs will be latched at the levels
that were set up at the D inputs.
6
7
8
9
An output-control input (OC) places the eight outputs in either
a normal logic state (high or low logic levels) or a high-imped-
ance state. The high-impedance third state and increased drive
provide the capability to drive the bus line in a bus-organized
system without need for interface or pull-up components.
10
LOGIC SYMBOL
(1)
OC
EN
C1
(11)
The output control OC does not affect the internal operations of
the latches. Old data can be retained or new data can be entered
while the outputs are off.
C
1D
(2)
(5)
(3)
1D
1Q
2Q
The devices are characterized over full military temperature
range of -55°C to +125°C.
(4)
2D
(6)
(7)
3D
3Q
(8)
(9)
(12)
(15)
(16)
(19)
4D
4Q
5Q
6Q
7Q
8Q
FUNCTION TABLE
(13)
5D
INPUTS
OUTPUT
(14)
6D
OC
L
C
H
H
L
nD
H
nQ
H
(17)
7D
(18)
8D
L
L
L
Note:
L
X
nQ0
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
Z 1
H
X
X
1
Note:
1. Data may be latched internally.