Datasheet > UT54ACTS280

UT54ACTS280

更新时间： 2024-11-07 01:20:43

品牌	Logo	应用领域
艾法斯 - AEROFLEX		/
页数	文件大小	规格书
10页	258K
描述
9-Bit Parity Generators/Checkers

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中文翻译

获取价格

数据手册

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UT54ACTS280 数据手册

Standard Products

UT54ACS280/UT54ACTS280

9-Bit Parity Generators/Checkers

Datasheet

November 2010

www.aeroflex.com/logic

FEATURES

PINOUTS

Generates either odd or even parity for nine data lines

Cascadable for n-bits parity

14-Pin DIP

Top View

1.2μ CMOS

- Latchup immune

V_DD

High speed

Low power consumption

Single 5 volt supply

Available QML Q or V processes

Flexible package

- 14-pin DIP

∑ EVEN

∑ ODD

V_SS

- 14-lead flatpack

UT54ACS280 - SMD 5962-96582

UT54ACTS280 - SMD 5962-96583

14-Lead Flatpack

Top View

DESCRIPTION

V_DD

The UT54ACS280 and the UT54ACTS280 are 9-bit parity gen-

erators/checkers that use high-performance circuitry and fea-

tures odd and even outputs to facilitate operation of either odd

or even parity application. The word-length capability is easily

expanded by cascading.

∑ EVEN

∑ ODD

V_SS

The devices are characterized over full military temperature

range of -55°C to +125°C.

FUNCTION TABLE

NUMBER OF INPUTS A THRU I

THAT ARE HIGH

OUTPUT

Σ EVEN

Σ ODD

0,2,4,6,8

1,3,5,7,9

LOGIC SYMBOL

(8)

(9)

(10)

(11)

(12)

(13)

(1)

(5)

(6)

∑

EVEN

∑

ODD

(2)

(4)

Note:

1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC

Publication 617-12.

12 3 4 5 6 7...10

中文翻译

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UT54ACTS280-PCA	ETC	获取价格	Parity Generator/Checker
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UT54ACTS280-PCX	ETC	获取价格	Parity Generator/Checker
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UT54ACTS280-PQCR	ETC	获取价格	Parity Generator/Checker
UT54ACTS280-PQXH	ETC	获取价格	Parity Generator/Checker
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UT54ACTS280-PVAH	ETC	获取价格	Parity Generator/Checker