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UT54ACTS109 PDF预览

UT54ACTS109

更新时间: 2024-01-11 11:33:41
品牌 Logo 应用领域
艾法斯 - AEROFLEX 振荡器
页数 文件大小 规格书
6页 55K
描述
Radiation-Hardened Dual J-K Flip-Flops

UT54ACTS109 数据手册

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UT54ACS109/UT54ACTS109  
Radiation-Hardened  
Dual J-K Flip-Flops  
FEATURES  
PINOUTS  
16-Pin DIP  
Top View  
radiation-hardened CMOS  
- Latchup immune  
• High speed  
• Low power consumption  
• Single 5 volt supply  
• Available QML Q or V processes  
• Flexible package  
- 16-pin DIP  
16  
1
VDD  
CLR1  
15  
14  
13  
12  
11  
10  
9
2
3
4
5
6
7
8
CLR2  
J2  
J
K1  
K2  
CLK1  
PRE1  
Q1  
CLK2  
PRE2  
Q2  
- 16-lead flatpack  
Q1  
VSS  
DESCRIPTION  
Q2  
The UT54ACS109 and the UT54ACTS109 are dual J-K posi-  
tive triggered flip-flops. A low level at the preset or clear inputs  
sets or resets the outputs regardless of the other input levels.  
When preset and clear are inactive (high), data at the J and K  
input meeting the setup time requirements are transferred to the  
outputsonthepositive-goingedgeoftheclockpulse. Following  
the hold time interval, data at the J and K input can be changed  
without affecting the levels at the outputs. The flip-flops can  
perform as toggle flip-flops by grounding K and tying J high.  
They also can perform as D flip-flops if J and K are tied together.  
16-Lead Flatpack  
Top View  
VDD  
1
16  
CLR1  
CLR2  
J2  
2
3
4
5
6
7
8
15  
14  
13  
12  
11  
10  
9
J1  
K1  
K2  
CLK1  
PRE1  
Q1  
CLK2  
PRE2  
Q2  
The devices are characterized over full military temperature  
range of -55 C to +125 C.  
Q1  
Q2  
VSS  
FUNCTION TABLE  
INPUTS  
CLR  
OUTPUT  
LOGIC SYMBOL  
PRE  
L
CLK  
X
J
X
X
X
K
X
X
X
Q
H
L
Q
L
(5)  
PRE1  
(2)  
H
L
L
S
(6)  
Q1  
J1  
H
X
H
J1  
(4)  
CLK1  
(3)  
C1  
K1  
R
H 1  
L
H 1  
H
L
X
(7)  
K1  
(1)  
Q1  
Q2  
CLR1  
H
H
H
H
H
H
H
H
H
H
L
H
L
L
L
(11)  
PRE2  
Toggle  
No Change  
(10)  
(14)  
J2  
H
H
X
(12)  
CLK2  
H
X
H
L
(13)  
(9)  
K2  
Q2  
(15)  
L
No Change  
CLR2  
Note:  
Note:  
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and  
IEC Publication 617-12.  
1. The output levels in this configuration are not guaranteed to meet the mini-  
mum levels for VOH if the lows at preset and clear are near VIL maximum. In  
addition, this configuration is nonstable; that is, it will not persist when either  
preset or clear returns to its inactive (high) level.  
61  
RadHard MSI Logic  

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