DATA SHEET
MOS INTEGRATED CIRCUIT
µPD784218, 784218Y
16-/8-BIT SINGLE-CHIP MICROCONTROLLERS
DESCRIPTION
The µPD784218 is a member of the µPD784218 Subseries of the 78K/IV Series. In addition to a high-speed and
high-performance CPU, the µPD784218 incorporates a variety of peripheral hardware such as ROM, RAM, I/O ports,
8-bit resolution A/D and D/A converters, timers, serial interfaces, real-time output ports, and an interrupt function.
The µPD784218YNote is the µPD784218 Subseries with a multi-master supporting I2C bus interface added.
Flash memory versions, the µPD78F4218 and 78F4218Y, which can operate in the same voltage range as the
mask ROM versions, and various development tools are also available.
Note Under development
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
µPD784218, 784218Y Subseries User’s Manual Hardware: U12970E
78K/IV Series User’s Manual Instructions:
U10905E
FEATURES
•
On-chip ROM correction function
InheritsperipheralfunctionsofµPD78078YSubseries
•
Standby function
HALT/STOP/IDLE mode
•
•
Minimum instruction execution time
160 ns
In power-saving mode: HALT/IDLE mode (with
subsystem clock)
(@ fXX = 12.5 MHz operation with main system clock)
61 µs
•
•
•
•
Clock division function
Watch timer: 1 channel
(@ fXT = 32.768 kHz operation with subsystem clock)
Internal high-capacity memory
· ROM: 256 KB
Watchdog timer: 1 channel
•
•
Clock output function
Selectable from fXX, fXX/2, fXX/22, fXX/23, fXX/24,
fXX/25, fXX/26, fXX/27, fXT
· RAM: 12,800 bytes
I/O ports: 86
•
Buzzer output function
Selectable from fXX/210, fXX/211, fXX/212, fXX/213
A/D converter: 8-bit resolution × 8 channels
D/A converter: 8-bit resolution × 2 channels
Supply voltage: VDD = 2.2 to 5.5 V
• Timer/counters:16-bit timer/event counter × 1 unit
8-bit timer/event counter × 6 units
•
•
•
•
Serial interfaces: 3 channels
UART/IOE (3-wire serial I/O): 2 channels
CSI (3-wire serial I/O, multi-master supporting I2C
busNote): 1 channel
Note µPD784218Y only
Unless otherwise specified, references in this document to the µPD784218 refer to the µPD784218 and
the µPD784218Y.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U12304EJ2V0DS00 (2nd edition)
Date Published March 2000 N CP(K)
Printed in Japan
The mark
shows major revised points.
1997, 2000
©