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UPD72852GB-8EU-A PDF预览

UPD72852GB-8EU-A

更新时间: 2024-11-24 12:58:15
品牌 Logo 应用领域
日电电子 - NEC 网络接口电信集成电路电信电路
页数 文件大小 规格书
48页 244K
描述
Interface Circuit, MOS, PQFP64, 10 X 10 MM, PLASTIC, LQFP-64

UPD72852GB-8EU-A 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP,针数:64
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.81JESD-30 代码:S-PQFP-G64
JESD-609代码:e6长度:10 mm
功能数量:1端子数量:64
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:1.6 mm标称供电电压:3.3 V
表面贴装:YES技术:MOS
电信集成电路类型:INTERFACE CIRCUIT温度等级:COMMERCIAL
端子面层:TIN BISMUTH端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
Base Number Matches:1

UPD72852GB-8EU-A 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD72852  
IEEE1394a-2000 COMPLIANT 400 Mbps TWO-PORT PHY LSI  
The µPD72852 is a two-port physical layer LSI that complies with the IEEE1394a-2000 specifications.  
The µPD72852 supports transfers of up to 400 Mbps and consumes less power than the µPD72850B. The  
µPD72852 is suitable for battery systems with an IEEE1394 interface.  
FEATURES  
The two-port physical layer LSI complies with IEEE1394a-2000  
Fully interoperable with IEEE1394 std 1394 Link (FireWireTM, i.LINKTM  
Meets IntelTM Mobile Power Guideline 2000  
)
Full IEEE1394a-2000 support includes: Suspend/Resume, connection debounce, arbitrated short bus reset, multi-  
speed concatenation, arbitration acceleration, fly-by concatenation  
Fully compliant with OHCI requirements  
Small package: 64-pin plastic LQFP  
Super low power: 68 mA (Operating mode)  
: 115 µA (Suspend mode)  
Data rate: 400/200/100 Mbps  
Supports PHY pinging and remote PHY access packets  
3.3 V single power supply (if power not supplied via node: 3.0 V single power supply)  
24.576 MHz crystal clock generation, 393.216 MHz PLL multiplying frequency  
64-bit flexible register incorporated in PHY register  
Electrically isolated Link interface  
Supports LPS/Link-on as part of PHY/Link interface  
External filter capacitors for PLL not required  
Extended Resume signaling for compatibility with legacy DV devices  
System power management by signaling of node power class information  
Cable power monitor (CPS) is equipped  
ORDERING INFORMATION  
Part number  
Package  
µPD72852GB-8EU  
64-pin plastic LQFP (10 x 10)  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No. S14920EJ3V0DS00 (3rd edition)  
Date Published March 2001 NS CP(K)  
Printed in Japan  
The mark shows major revised points.  
2000  

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