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UPD703039YGM-XXX-UEU PDF预览

UPD703039YGM-XXX-UEU

更新时间: 2024-09-16 13:15:15
品牌 Logo 应用领域
日电电子 - NEC 微控制器
页数 文件大小 规格书
44页 287K
描述
Microcontroller, 32-Bit, MROM, 20MHz, MOS, PQFP176, 24 X 24 MM, FINE PITCH, PLASTIC, LQFP-176

UPD703039YGM-XXX-UEU 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:24 X 24 MM, FINE PITCH, PLASTIC, LQFP-176Reach Compliance Code:compliant
风险等级:5.85具有ADC:YES
其他特性:OPERATES AT 2.7V MIN SUPPLY @ 16 MHZ地址总线宽度:22
位大小:32最大时钟频率:20 MHz
DAC 通道:NODMA 通道:YES
外部数据总线宽度:16JESD-30 代码:S-PQFP-G176
JESD-609代码:e0长度:24 mm
I/O 线路数量:151端子数量:176
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not QualifiedROM可编程性:MROM
座面最大高度:1.6 mm速度:20 MHz
最大供电电压:3.6 V最小供电电压:3.1 V
标称供电电压:3.3 V表面贴装:YES
技术:MOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:24 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

UPD703039YGM-XXX-UEU 数据手册

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PRELIMINARY DATA SHEET  
MOS INTEGRATED CIRCUIT  
µ
PD703039, 703039Y, 703040, 703040Y, 703041, 703041Y  
V850/SV1TM  
32-/16-BIT SINGLE-CHIP MICROCONTROLLERS  
DESCRIPTION  
The µPD703039, 703039Y, 703040, 703040Y, 703041, and 703041Y (collectively known as the V850/SV1) are  
products in the low-power series of V850 FamilyTM products, which are NEC’s single-chip microcontrollers for real-  
time control.  
The V850/SV1 employs the CPU core of the V850 Family, and has on-chip peripheral functions such as large  
capacity ROM/RAM, a multi-function timer/counter, serial interface, A/D converter, DMA controller, PWM, and a  
Vsync/Hsync separation circuit.  
The V850/SV1 not only realizes the low power consumption necessary for applications such as camcorders, but  
also extremely high cost performance.  
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before  
designing.  
V850/SV1 User’s Manual Hardware  
: U14462E  
V850 Family User’s Manual Architecture : U10243E  
FEATURES  
{ 10-bit resolution A/D converter: 16 channels  
{ Number of instructions: 74  
{ Timer/counter  
{ Minimum instruction execution time:  
62.5 ns (@ 16 MHz operation with main system clock)  
24-bit: 2 channels, 16-bit: 2 channels  
8-bit: 8 channels  
30.5 µs (@ 32.768 kHz operation with subsystem clock) { Watch timer: 1 channel  
{ General-purpose registers: 32 bits × 32 registers  
{ Instruction set (signed multiplication, saturation  
{ Watchdog timer: 1 channel  
{ DMA controller: 6 channels  
operations, 32-bit shift instructions, bit manipulation { Interrupts and exceptions  
instructions, load/store instructions)  
{ Memory space:  
Non-maskable interrupt: 2 sources  
Maskable interrupt  
16 MB linear address space  
Memory block allocation function: 2 MB per block  
{ External bus: 16-bit multiplexed bus  
{ Internal memory:  
: µPD703039, 703040, 703041 (51 sources)  
: µPD703039Y, 703040Y, 703041Y (52 sources)  
Software exception: 32 sources  
Exception trap: 1 source  
µPD703039, 703039Y  
{ Serial interface (SIO)  
(ROM: 256 KB, RAM: 8 KB)  
µPD703040, 703040Y  
Asynchronous serial interface (UART)  
Clocked serial interface (CSI)  
(ROM: 256 KB, RAM: 16 KB)  
µPD703041, 703041Y  
3-wire variable length serial interface (CSI4)  
I2C bus interface (I2C) (µPD703039Y, 703040Y,  
703041Y)  
(ROM: 192 KB, RAM: 8 KB)  
{ I/O lines Total: 151  
{ RTP: 8 bits × 2 channels or 4 bits × 4 channels  
The information contained in this document is being issued in advance of the production cycle for the  
device. The parameters for the device may change before final production or NEC Corporation, at its own  
discretion, may withdraw the device prior to its production.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No. U13953EJ1V0DS00 (1st edition)  
Date Published March 2000 N CP(K)  
Printed in Japan  
The mark shows major revised points.  
2000  
©

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UPD703040YF1-XXX-EN2 RENESAS

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