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UPD703031AGF-XXX-3BA PDF预览

UPD703031AGF-XXX-3BA

更新时间： 2024-10-31 09:28:11
品牌 Logo 应用领域
日电电子 - NEC 微控制器
页数 文件大小 规格书
56页 357K
描述
Microcontroller, 32-Bit, MROM, 20MHz, MOS, PQFP100, 14 X 20 MM, PLASTIC, QFP-100

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UPD703031AGF-XXX-3BA 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：14 X 20 MM, PLASTIC, QFP-100Reach Compliance Code：compliant
风险等级：5.92具有ADC：YES
地址总线宽度：22位大小：32
最大时钟频率：20 MHzDAC 通道：NO
DMA 通道：YES外部数据总线宽度：16
JESD-30 代码：R-PQFP-G100JESD-609代码：e0
长度：20 mmI/O 线路数量：83
端子数量：100最高工作温度：85 °C
最低工作温度：-40 °CPWM 通道：NO
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装形状：RECTANGULAR封装形式：FLATPACK
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
ROM可编程性：MROM座面最大高度：3 mm
速度：20 MHz最大供电电压：5.5 V
最小供电电压：4 V标称供电电压：5 V
表面贴装：YES技术：MOS
温度等级：INDUSTRIAL端子面层：TIN LEAD
端子形式：GULL WING端子节距：0.65 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：14 mmuPs/uCs/外围集成电路类型：MICROCONTROLLER
Base Number Matches：1

UPD703031AGF-XXX-3BA 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µ
PD703031A, 703031AY, 703033A,  
703033AY, 70F3033A, 70F3033AY  
V850/SB1TM  
32-/16-BIT SINGLE-CHIP MICROCONTROLLERS  
DESCRIPTION  
The µPD703031A, 703031AY, 703033A, 703033AY, 70F3033A, and 70F3033AY (V850/SB1) are 32-/16-bit  
single-chip microcontrollers of the V850 FamilyTM for AV equipment. 32-bit CPU, ROM, RAM, timer/counters, serial  
interfaces, A/D converter, DMA controller, and so on are integrated on a single chip.  
The µPD70F3033A and 70F3033AY have flash memory in place of the internal mask ROM of the µPD703033A  
and 703033AY. Because flash memory allows the program to be written and erased electrically with the device  
mounted on the board, these products are ideal for the evaluation stages of system development, small-scale  
production, and rapid development of new products.  
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before  
designing.  
V850/SB1, V850/SB2TM User’s Manual Hardware: U13850E  
V850 Family User’s Manual Architecture:  
U10243E  
FEATURES  
{ Number of instructions: 74  
{ Minimum instruction execution time: 50 ns (@ internal 20 MHz operation)  
{ General-purpose registers: 32 bits × 32 registers  
{ Instruction set: Signed multiplication, saturation operations, 32-bit shift instructions, bit manipulation instructions,  
load/store instructions  
{ Memory space: 16 MB linear address space  
{ Internal memory ROM: 128 KB (µPD703031A, 703031AY: mask ROM)  
256 KB (µPD703033A, 703033AY: mask ROM)  
256 KB (µPD70F3033A, 70F3033AY: flash memory)  
RAM: 12 KB (µPD703031A, 703031AY)  
16 KB (µPD703033A, 703033AY, 70F3033A, 70F3033AY)  
{ Interrupt/exception: µPD703031A, 703033A, 70F3033A (external: 8, internal: 30 sources, exception: 1 source)  
µPD703031AY, 703033AY, 70F3033AY (external: 8, internal: 31 sources, exception: 1 source)  
{ I/O lines Total: 83  
{ Timer/counters: 16-bit timer (2 channels: TM0, TM1)  
8-bit timer (6 channels: TM2 to TM7)  
{ Watch timer: 1 channel  
{ Watchdog timer: 1 channel  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No. U14734EJ1V0DS00 (1st edition)  
Date Published April 2000 N CP(K)  
Printed in Japan  
©
2000  
1234567...56

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