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UPD488385FB-C80-50-BF1 PDF预览

UPD488385FB-C80-50-BF1

更新时间： 2024-11-20 15:56:07
品牌 Logo 应用领域
日电电子 - NEC 动态存储器内存集成电路
页数 文件大小 规格书
68页 1924K
描述
Rambus DRAM, 4MX18, MOS, PBGA74, BGA-74

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中文翻译

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UPD488385FB-C80-50-BF1 技术参数

生命周期：Obsolete零件包装代码：BGA
包装说明：BGA,针数：74
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.32.00.02风险等级：5.84
访问模式：BLOCK ORIENTED PROTOCOLJESD-30 代码：R-PBGA-B74
内存密度：75497472 bit内存集成电路类型：RAMBUS DRAM
内存宽度：18功能数量：1
端口数量：1端子数量：74
字数：4194304 words字数代码：4000000
工作模式：SYNCHRONOUS组织：4MX18
封装主体材料：PLASTIC/EPOXY封装代码：BGA
封装形状：RECTANGULAR封装形式：GRID ARRAY
认证状态：Not Qualified最大供电电压 (Vsup)：2.63 V
最小供电电压 (Vsup)：2.37 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：MOS
端子形式：BALL端子位置：BOTTOM
Base Number Matches：1

UPD488385FB-C80-50-BF1 数据手册

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PRELIMINARY DATA SHEET  
MOS INTEGRATED CIRCUIT  
µ
PD488385  
72 M-bit (256K x 18 x 16d)  
™
Direct Rambus DRAM  
Description  
The Direct Rambus DRAM (Direct RDRAM ) is a general purpose high-performance memory device suitable for  
use in a broad range of applications including computer memory, graphics, video, and any other application where  
high bandwidth and low latency are required.  
The 72 M-bit Direct Rambus DRAMs (RDRAM ) are extremely high-speed CMOS DRAMs organized as 4 M words  
by 18 bits. The use of Rambus Signaling Level (RSL) technology permits 600 MHz or 800 MHz transfer rates while  
using conventional system and board design technologies. Direct RDRAM devices are capable of sustained data  
transfers at 1.25 ns per two bytes (10 ns per sixteen bytes).  
The architecture of the Direct RDRAMs allows the highest sustained bandwidth for multiple, simultaneous randomly  
addressed memory transactions. The separate control and data buses with independent row and column control  
yield over 95% bus efficiency. The Direct RDRAM’s sixteen banks support up to four simultaneous transactions.  
System oriented features for mobile, graphics and large memory systems include power management, byte  
masking, and x18 organization. The two data bits in the x18 organization are general and can be used for additional  
storage and bandwidth or for error correction.  
The 72 M-bit Direct RDRAMs are offered in a CSP horizontal package suitable for desktop as well as low-profile  
add-in card and mobile applications. Direct RDRAMs operate from a 2.5 volt supply.  
Features  
Highest sustained bandwidth per DRAM device  
•
- 1.6 GB/s sustained data transfer rate  
- Separate control and data buses for maximized efficiency  
- Separate row and column control buses for easy scheduling and highest performance  
- 16 banks: four transactions can take place simultaneously at full bandwidth data rates  
Low latency features  
•
- Write buffer to reduce read latency  
- 3 precharge mechanisms for controller flexibility  
- Interleaved transactions  
Advanced power management:  
•
- Multiple low power states allows flexibility in power consumption versus time to transition to active state  
- Power-down self-refresh  
Organization: 1 Kbyte pages and 16 banks, x18  
•
- x18 organization allows ECC configurations or increased storage/bandwidth  
Uses Rambus Signaling Level (RSL) for up to 800 MHz operation  
Package : 74-pin D2BGA ( Die Dimension Ball Grid Array )  
•
•
★
The information in this document is subject to change without notice.  
Document No. M13399EJ2V1DS00 (2nd edition)  
Date Published November 1998 NS CP (K)  
Printed in Japan  
The mark • shows major revised points.  
1998  
©
1234567...68

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