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UPD44325182BF5-E40Y-FQ1-A PDF预览

UPD44325182BF5-E40Y-FQ1-A

更新时间: 2023-06-15 00:00:00
品牌 Logo 应用领域
瑞萨 - RENESAS 静态存储器
页数 文件大小 规格书
36页 386K
描述
2MX18 QDR SRAM, 0.45ns, PBGA165, 15 X 17 MM, LEAD FREE, PLASTIC, BGA-165

UPD44325182BF5-E40Y-FQ1-A 数据手册

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Datasheet  
μPD44325092B  
μPD44325182B  
μPD44325362B  
R10DS0038EJ0200  
Rev.2.00  
36M-BIT QDRTM II SRAM  
2-WORD BURST OPERATION  
August 11, 2011  
Description  
The μPD44325092B is a 4,194,304-word by 9-bit, the μPD44325182B is a 2,097,152-word by 18-bit and the  
μPD44325362B is a 1,048,576-word by 36-bit synchronous quad data rate static RAM fabricated with  
advanced CMOS technology using full CMOS six-transistor memory cell.  
The μPD44325092B, μPD44325182B and μPD44325362B integrate unique synchronous peripheral circuitry  
and a burst counter. All input registers controlled by an input clock pair (K and K#) are latched on the  
positive edge of K and K#. These products are suitable for application which require synchronous operation,  
high speed, low voltage, high density and wide bit configuration.  
These products are packaged in 165-pin PLASTIC BGA.  
Features  
1.8 ± 0.1 V power supply  
165-pin PLASTIC BGA (15 x 17)  
HSTL interface  
PLL circuitry for wide output data valid window and future frequency scaling  
Separate independent read and write data ports with concurrent transactions  
100% bus utilization DDR READ and WRITE operation  
Two-tick burst for low DDR transaction size  
Two input clocks (K and K#) for precise DDR timing at clock rising edges only  
Two output clocks (C and C#) for precise flight time and clock skew matching-clock  
and data delivered together to receiving device  
Internally self-timed write control  
Clock-stop capability. Normal operation is restored in 20 μs after clock is resumed.  
User programmable impedance output (35 to 70 Ω)  
Fast clock cycle time : 3.3 ns (300 MHz), 3.5 ns (287 MHz), 4.0 ns (250 MHz), 5.0 ns (200 MHz)  
Simple control logic for easy depth expansion  
JTAG 1149.1 compatible test access port  
R10DS0038EJ0200 Rev.2.00  
August 11, 2011  
Page 1 of 36  

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