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UPD30541GD-200-WML-A PDF预览

UPD30541GD-200-WML-A

更新时间： 2024-11-21 20:10:43
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管
页数 文件大小 规格书
4页 229K
描述
UPD30541GD-200-WML-A

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中文翻译

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UPD30541GD-200-WML-A 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：,Reach Compliance Code：compliant
Factory Lead Time：1 week风险等级：5.76
湿度敏感等级：4Base Number Matches：1

UPD30541GD-200-WML-A 数据手册

 浏览型号UPD30541GD-200-WML-A的Datasheet PDF文件第2页浏览型号UPD30541GD-200-WML-A的Datasheet PDF文件第3页浏览型号UPD30541GD-200-WML-A的Datasheet PDF文件第4页 
VR5432  
64-Bit MIPS RISC Microprocessor  
The VR5432ä microprocessor brings a new level of high-end performance to low-cost  
embedded design. This member of NEC’s VR Seriesä microprocessors operates at either  
167 or 200 MHz and uses a gated clock, minimal switching techniques, and a special circuit  
design to keep power consumption low. Its symmetric dual-issue pipeline with six  
independent execution units executes any combination of arithmetic logic unit (ALU), floating-  
point, or rotate instructions, while 32 KB instruction and data caches implement cache line  
locking to keep critical code and data cached. Multiple outstanding read transactions allow  
both caches to be filled concurrently, keeping the processor supplied with a steady stream of  
instructions and data. Mapping of accesses to virtual memory addresses is optimized with a  
48-double-entry joint instruction/data translation lookaside buffer (TLB) and two separate  
four-entry micro TLBs for instructions and data.  
Description  
Digital set-top boxes, Internet appliances, and office automation equipment  
Applications  
Features  
·
·
Dual-issue superscalar pipeline with six independent units  
Separate 32 KB two-way, set-associative instruction and data caches with cache line  
locking and parity  
·
·
Two unified 64-bit integer/floating-point units, each with 64-bit barrel shifters  
High-speed operating frequency  
¾
¾
316 Dhrystone MIPS at 167 MHz  
377 Dhrystone MIPS at 200 MHz  
·
32-bit system bus  
¾
¾
83 MHz SysAD bus speed at 167 MHz  
100 MHz SysAD bus speed at 200 MHz  
·
·
On-chip debugging via JTAG, N-wire and N-trace functions  
Low power consumption  
¾
¾
1.8 watts at 167 MHz (typ.)  
2.1 watts at 200 MHz (typ.)  
·
·
·
64-bit architecture with a 32-bit multiplexed address/data bus interface  
MIPS IV-compliant instruction set architecture  
MIPS architecture extensions  
¾
Integer multiply-accumulate instructions and other register-based multiply variations  
for fast DSP support  
¾
¾
¾
Integer rotate instructions for fast 32-bit and 64-bit string operations  
Packed data vector operations for fast 8 x 8-bit image and multimedia processing  
Cache line locking instructions (both caches) for better cache management  
1234

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与UPD30541GD-200-WML-A相关器件

型号 品牌 获取价格 描述 数据表
UPD30550 NEC

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 		VR5500⑩ 64-/32-BIT MICROPROCESSOR
UPD30550A ETC

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 		UPD30550A Data Sheet | Data Sheet[04/2003]
UPD30550AF2-300-NN1 NEC

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 		RISC Microprocessor, 64-Bit, 300MHz, MOS, PBGA272, 29 X 29 MM, PLASTIC, BGA-272
UPD30550AF2-300-NN1-A NEC

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 		RISC Microprocessor, 64-Bit, 300MHz, MOS, PBGA272, 29 X 29 MM, LEAD FREE, CAVITY DOWN, PLA
UPD30550AF2-400-NN1 NEC

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 		RISC Microprocessor, 64-Bit, 400MHz, MOS, PBGA272, 29 X 29 MM, PLASTIC, BGA-272
UPD30550AF2-400-NN1-A NEC

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 		RISC Microprocessor, 64-Bit, 400MHz, MOS, PBGA272, 29 X 29 MM, LEAD FREE, CAVITY DOWN, PLA
UPD30550AF2-400-NN1-A RENESAS

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 		UPD30550AF2-400-NN1-A
UPD30550AF2-600-NN1 RENESAS

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 		暂无描述
UPD30550AF2-800-NN1 RENESAS

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 		UPD30550AF2-800-NN1
UPD30550AGD-300-WML NEC

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 		RISC Microprocessor, 64-Bit, 300MHz, MOS, PQFP208, 28 X 28 MM, FINE PITCH, PLASTIC, QFP-20

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