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UL631H256S2K45G1 PDF预览

UL631H256S2K45G1

更新时间: 2024-11-13 03:23:39
品牌 Logo 应用领域
SIMTEK 内存集成电路静态存储器光电二极管
页数 文件大小 规格书
13页 180K
描述
SimtekLow Voltage SoftStore 32K x 8 nvSRAM

UL631H256S2K45G1 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SOP,Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.74最长访问时间:45 ns
JESD-30 代码:R-PDSO-G28JESD-609代码:e3
内存密度:262144 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:8功能数量:1
端子数量:28字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:32KX8封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
认证状态:Not Qualified最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子位置:DUAL
Base Number Matches:1

UL631H256S2K45G1 数据手册

 浏览型号UL631H256S2K45G1的Datasheet PDF文件第2页浏览型号UL631H256S2K45G1的Datasheet PDF文件第3页浏览型号UL631H256S2K45G1的Datasheet PDF文件第4页浏览型号UL631H256S2K45G1的Datasheet PDF文件第5页浏览型号UL631H256S2K45G1的Datasheet PDF文件第6页浏览型号UL631H256S2K45G1的Datasheet PDF文件第7页 
Obsolete - Not Recommended for New Designs  
UL631H256  
SimtekLow Voltage SoftStore 32K x 8 nvSRAM  
Features  
Description  
High-performance CMOS non-  
The UL631H256 has two separate of a fast SRAM with nonvolatile  
volatile static RAM 32768 x 8 bits modes of operation: SRAM mode data integrity.  
35 and 45 ns Access Times  
15 and 20 ns Output Enable  
Access Times  
Software STORE Initiation  
Automatic STORE Timing  
106 STORE cycles to EEPROM  
100 years data retention in  
EEPROM  
and nonvolatile mode. In SRAM Once a STORE cycle is initiated,  
mode, the memory operates as an further input or output are disabled  
ordinary static RAM. In nonvolatile until the cycle is completed.  
operation, data is transferred in Because a sequence of addresses  
parallel from SRAM to EEPROM or is used for STORE initiation, it is  
from EEPROM to SRAM. In this important that no other read or  
mode SRAM functions are disab- write accesses intervene in the  
led.  
sequence or the sequence will be  
Automatic RECALL on Power Up The UL631H256 is a fast static aborted.  
Software RECALL Initiation  
Unlimited RECALL cycles from  
EEPROM  
RAM (35 and 45 ns), with a nonvo- Internally, RECALL is a two step  
latile electrically erasable PROM procedure. First, the SRAM data is  
(EEPROM) element incorporated cleared and second, the nonvola-  
in each static memory cell. The tile information is transferred into  
SRAM can be read and written an the SRAM cells.  
Unlimited Read and Write to  
SRAM  
Wide voltage range: 2.7 ... 3.6 V  
(3.0 ... 3.6 V for 35 ns type)  
Operating temperature range:  
0 to 70 °C  
unlimited number of times, while The RECALL operation in no way  
independent nonvolatile data resi- alters the data in the EEPROM  
des in EEPROM. Data transfers cells. The nonvolatile data can be  
from the SRAM to the EEPROM recalled an unlimited number of  
(the STORE operation), or from the times.  
-40 to 85 °C  
QS 9000 Quality Standard  
RoHS compliance and Pb- free  
ESD protection > 2000 V  
(MIL STD 883C M3015.7-HBM)  
Package: SOP28 (330 mil)  
EEPROM to the SRAM (the The UL631H256 is pin compatible  
RECALL operation) are initiated with standard SRAMs.  
through software sequences.  
The UL631H256 combines the  
high performance and ease of use  
Pin Configuration  
Pin Description  
G
A11  
A9  
1
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
n.c.  
A10  
E
Signal Name Signal Description  
VCC  
W
A13  
A8  
A9  
A11  
G
A10  
E
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0 10  
DQ0  
DQ1  
DQ2  
VSS  
1
2
3
4
5
6
7
8
9
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
2
3
A0 - A14  
Address Inputs  
Data In/Out  
A8  
4
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
VSS  
DQ2  
DQ1  
DQ0  
A0  
A13  
W
n. c.  
VCC  
n. c.  
A14  
A12  
A7 12  
A6 13  
A5  
A4  
A3  
5
DQ0 - DQ7  
6
7
Chip Enable  
E
8
TSOP  
SOP  
9
Output Enable  
Write Enable  
Power Supply Voltage  
Ground  
G
10  
11  
W
11  
12  
13  
14  
VCC  
VSS  
14  
15  
16  
A1  
A2  
n.c.  
Top View  
Top View  
March 31, 2006  
STK Control #ML0057  
1
Rev 1.0  

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