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UJA1061TW/2V5 PDF预览

UJA1061TW/2V5

更新时间: 2024-11-19 08:20:35
品牌 Logo 应用领域
恩智浦 - NXP 以太网:16GBASE-T电信光电二极管电信集成电路
页数 文件大小 规格书
74页 341K
描述
IC DATACOM, ETHERNET TRANSCEIVER, PDSO32, 6 X 11 MM, 0.65 MM PITCH, PLASTIC, MO-153, SOT-549-1, HTSSOP-32, Network Interface

UJA1061TW/2V5 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:HTSSOP,针数:32
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84JESD-30 代码:R-PDSO-G32
JESD-609代码:e3长度:11 mm
功能数量:1端子数量:32
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HTSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH
认证状态:Not Qualified座面最大高度:1.1 mm
表面贴装:YES电信集成电路类型:ETHERNET TRANSCEIVER
温度等级:AUTOMOTIVE端子面层:TIN
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:6.1 mm

UJA1061TW/2V5 数据手册

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UJA1061  
Fault-tolerant CAN/LIN fail-safe system basis chip  
Rev. 05 — 22 November 2007  
Product data sheet  
1. General description  
The UJA1061 fail-safe System Basis Chip (SBC) replaces basic discrete components  
which are common in every Electronic Control Unit (ECU) with a Controller Area Network  
(CAN) and a Local Interconnect Network (LIN) interface. The fail-safe SBC supports all  
networking applications which control various power and sensor peripherals by using  
fault-tolerant CAN as the main network interface and LIN as a local sub-bus. The fail-safe  
SBC contains the following integrated devices:  
ISO11898-3 compliant fault-tolerant CAN transceiver, interoperable with TJA1054,  
TJA1054A and TJA1055  
LIN transceiver compliant with LIN 2.0 and SAE J2602, and compatible with LIN 1.3  
Advanced independant watchdog  
Dedicated voltage regulators for microcontroller and CAN transceiver  
Serial peripheral interface (full duplex)  
Local wake-up input port  
Inhibit / limp home output port  
In addition to the advantages of integrating these common ECU functions in a single  
package, the fail-safe SBC offers an intelligent combination of system-specific functions  
such as:  
Advanced low power concept  
Safe and controlled system start-up behavior  
Advanced fail-safe system behavior that prevents any conceivable deadlock  
Detailed status reporting on system and sub-system levels  
The UJA1061 is designed to be used in combination with a microcontroller with a CAN  
controller. The fail-safe SBC ensures that the microcontroller is always started up in a  
defined manner. In failure situations the fail-safe SBC will maintain the microcontroller  
function for as long as possible, to provide full monitoring and software driven fall-back  
operation.  
The UJA1061 is designed for 14 V single power supply architectures and for 14 V and  
42 V dual power supply architectures.  

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