DATA SHEET
UF1000~UF1008
ULTRAFAST RECOVERYRECTIFIERS
Unit : inch (mm)
TO-220AC
10.0 Amperes
50 to 800 Volts
CURRENT
VOLTAGE
FEATURES
• Plastic package has Underwriters Laboratory
Flammability Classification 94V-O utilizing
Flame Retardant Epoxy Molding Compound.
.419(10.66)
.387(9.85)
.196(5.00)
.163(4.16)
.139(3.55)
MIN
.054(1.39)
.045(1.15)
• Exceeds environmental standards of
MIL-S-19500/228
• Low power loss, high efficiency.
• Low forwrd voltge, high current capability
• High surge capacity.
• Ultra fast recovery time, high voltage.
• Both normal and Pb free product are available :
Normal : 80~95% Sn, 5~20% Pb
Pb free: 98.5% Sn above
.038(0.96)
.019(0.50)
.025(0.65)MAX
MECHANCALDATA
Case: TO-220AC full molded plastic package
Terminals: Lead solderable per MIL-STD-202, Method 208
Polarity: As marked.
.1(2.54)
.1(2.54)
Standard packaging: Any
Weight: 0.08 ounces, 2.24grams.
MAXIMUMRATINGSANDELECTRICALCHARACTERISTICS
Ratings at 25°C ambient temperature unless otherwise specified. Single phase, half wave, 60 Hz, resistive or inductive load.
For capacitive load, derate current by 20%
PARAMETER
SYMBOL UF1000 UF1001 UF1002 UF1003 UF1004 UF1006 UF1008 UNITS
Maximum Recurrent Peak Reverse Voltage
V
V
RRM
RMS
50
35
50
100
70
200
140
200
300
210
300
10
400
280
400
600
420
600
800
560
800
V
V
V
A
A
V
Maximum RMS Voltage
Maximum DC Blocking Voltage
V
DC
100
Maximum Average Forward Current at Tc = 100O
C
I
AV
Peak Forward Surge Current :8.3ms single half sine-
wave superimposed on rated load(JEDEC method)
I
FSM
150
Maximum Forward Voltage at 10.0A
V
F
1.0
1.30
1.70
Maximum DC Reverse Current T
at Rated DC Blocking Voltage T
A
A
=25O
=125O
C
10
500
I
R
uA
C
Typical Junction Capacitance (Note 1)
C
J
80
50
50
pF
ns
Maximum Reverse Recovery Time (Note 2)
Typical Thermal Resistance (Note 3)
T
RR
100
RθJC
2
OC / W
Operating Junction and Storage Temperature Range
NOTES:
T
J
,TSTG
-50 to +150
OC
1. Measured at 1 MHz and applied reverse voltage of 4.0 VDC.
2. Reverse Recovery Test Conditions: IF=.5A, IR=1A, Irr=.25A.
3. Thermal resistance from Junction to case.
4. Both Bonding and Chip structure are available.
PAGE . 1
STAD-FEB.19.2004