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UCC38083

更新时间： 2024-11-27 22:59:31
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19页 427K
描述
8-PIN CURRENT MODE PUSH-PULL PWM CONTROLLERS WITH PROGRAMMABLE SLOPE COMPENSATION

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UCC38083 数据手册

 浏览型号UCC38083的Datasheet PDF文件第2页浏览型号UCC38083的Datasheet PDF文件第3页浏览型号UCC38083的Datasheet PDF文件第4页浏览型号UCC38083的Datasheet PDF文件第5页浏览型号UCC38083的Datasheet PDF文件第6页浏览型号UCC38083的Datasheet PDF文件第7页 
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SLUS488B − SEPTEMBER 2002 − REVISED MAY 2003  
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FEATURES  
APPLICATIONS  
D
D
D
D
Programmable Slope Compensation  
D
D
D
D
High-Efficiency Switch-Mode Power Supplies  
Telecom dc-to-dc Converters  
Internal Soft-Start on the UCC38083/4  
Cycle-by-Cycle Current Limiting  
Point-of-Load or Point-of-Use Power Modules  
Low Start-Up Current of 120 µA and 1.5 mA  
Typical Run Current  
Low-Cost Push-Pull and Half-Bridge  
Applications  
D
D
Single External Component Oscillator  
Programmable from 50 kHz to 1 MHz  
DESCRIPTION  
The UCC38083/4/5/6 is a family of BiCMOS pulse width  
modulation (PWM) controllers for dc-to-dc or off-line  
fixed-frequency current-mode switching power  
supplies. The dual output stages are configured for the  
push-pull topology. Both outputs switch at half the  
oscillator frequency using a toggle flip-flop. The dead  
time between the two outputs is typically 110 ns, limiting  
each output’s duty cycle to less than 50%.  
High-Current Totem-Pole Dual Output Stage  
Drives Push-Pull Configuration with 1-A Sink  
and 0.5-A Source Capability  
D
Current Sense Discharge Transistor to  
Improve Dynamic Response  
D
Internally Trimmed Bandgap Reference  
Undervoltage Lockout with Hysteresis  
D
The new UCC3808x family is based on the UCC3808A  
architecture. The major differences include the addition  
of a programmable slope compensation ramp to the CS  
signal and the removal of the error amplifier. The current  
flowing out of the ISET pin through an external resistor  
is monitored internally to set the magnitude of the slope  
compensation function. This device also includes an  
OUT internal discharge transistor from the CS pin to ground,  
which is activated at each clock cycle after the pulse is  
terminated. This discharges any filter capacitance on  
the CS pin during each cycle and helps minimize filter  
capacitor values and current sense delay.  
BASIC APPLICATION  
V
IN  
POWER  
TRANSFORMER  
V
VDD  
UCC3808x  
CTRL OUTA  
The UCC38083 and the UCC38084 devices have a  
typical soft-start interval time of 3.5 ms while the  
UCC38085 and the UCC38086 has less than 100 µs for  
applications where internal soft-start is not desired.  
RT  
OUTB  
CS  
R
F
ISET  
The UCC38083 and the UCC38085 devices have the  
turn-on/off thresholds of 12.5 V / 8.3 V, while the  
UCC38084 and the UCC38086 has the turn-on/off  
thresholds of 4.3 V / 4.1 V. Each device is offered in 8-pin  
TSSOP (PW), 8-pin SOIC (D) and 8-pin PDIP (P)  
packages.  
GND  
R
T
R
S
R
SET  
C
F
FEEDBACK  
UDG−01080  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2002−2003, Texas Instruments Incorporated  
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ꢢ ꢦ ꢣ ꢢꢛ ꢜꢰ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢫ  
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UCC38083 替代型号

型号 品牌 替代类型 描述 数据表
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