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UCC28515N

更新时间： 2024-11-25 22:59:31
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德州仪器 - TI 功率因数校正
页数 文件大小 规格书
39页 720K
描述
ADVANCED PFC/PWM COMBINATION CONTROLLERS

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UCC28515N 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：DIP
包装说明：DIP, DIP20,.3针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：8.52
其他特性：PEAK CURRENT MODE ALSO AVAILABLE模拟集成电路 - 其他类型：POWER FACTOR CONTROLLER WITH POST REGULATOR
控制模式：CURRENT-MODE控制技术：PULSE WIDTH MODULATION
最大输入电压：15 V最小输入电压：10.8 V
标称输入电压：12 VJESD-30 代码：R-PDIP-T20
JESD-609代码：e4长度：25.4 mm
功能数量：1端子数量：20
最高工作温度：105 °C最低工作温度：-40 °C
最大输出电流：3.5 A封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP20,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：5.08 mm子类别：Switching Regulator or Controllers
表面贴装：NO切换器配置：BOOST
最大切换频率：240 kHz技术：BICMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.62 mmBase Number Matches：1

UCC28515N 数据手册

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SLUS517B − DECEMBER 2002 − REVISED AUGUST 2004  
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FEATURES  
DESCRIPTION  
The UCC28510 series of combination PFC/PWM  
D
D
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D
Provides Control of PFC and PWM Power  
Stages In One Device  
controllers provide complete control functionality  
for any off-line power system requiring  
compliance with the IEC1000−3−2 harmonic  
reduction requirements. By combining the control  
and drive signals for the PFC and the PWM stages  
into a single device, significant performance and  
cost benefits are gained. By managing the  
modulation mechanisms of the two stages  
(leading-edge modulation for PFC and  
trailing-edge modulation for PWM), the ripple  
current in the boost capacitor is minimized.  
Based on the average current mode control  
architecture with input voltage feedforward of prior  
PFC/PWM combination controllers, these devices  
offer performance advantages. Two new key  
PWM features are programmable maximum duty  
cycle and the 2x PWM frequency options to the  
base PFC frequency. For the PFC stage, the  
devices feature an improved multiplier and the  
use of a transconductance amplifier for enhanced  
transient response.  
Leading-Edge PFC, Trailing-Edge PWM  
Modulation for Reduced Ripple  
Built-In Sequencing of PFC and PWM  
Turn-On  
2-A Source and 3-A Sink Gate Drive for Both  
PFC and PWM Stages  
Typical 16-ns Rise Time and 7-ns Fall Time  
into 1-nF Loads  
PFC Features  
− Average-Current-Mode Control for  
Continuous Conduction Mode Operation  
− Highly-Linear Multiplier for Near-Unity  
Power Factor  
− Input Voltage Feedforward Implementation  
− Improved Load Transient Response  
− Accurate Power Limiting  
− Zero Power Detect  
PWM Features  
− Peak-Current-Mode Control Operation  
− 1:1 or 1:2 PFC:PWM Frequency Options  
− Programmable maximum duty cycle  
− Programmable Soft-Start  
− Two Hysteresis Options for Differing  
Hold-Up Time Requirements  
The core of the PFC section is in a three-input  
multiplier that generates the reference signal for  
the line current. The UCC28510 series features a  
highly linearized multiplier circuit capable of  
producing a low distortion reference for the line  
current over the full range of line and load  
conditions. A low-offset, high-bandwidth current  
error amplifier ensures that the actual inductor  
current (sensed through a resistor in the return  
path) follows the multiplier output command  
signal. The output voltage error is processed  
through a transconductance voltage amplifier.  
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Copyright 2004, Texas Instruments Incorporated  
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