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UCC27223PWPRG4 PDF预览

UCC27223PWPRG4

更新时间： 2024-09-18 22:26:19
品牌 Logo 应用领域
德州仪器 - TI 驱动器稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管信息通信管理功效
页数 文件大小 规格书
30页 535K
描述
HIGH-EFFICIENCY PREDICTIVE SYNCHRONOUS BUCK DRIVER WITH ENABLE

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中文翻译

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UCC27223PWPRG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：GREEN, PLASTIC, HTSSOP-14针数：14
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.22
Is Samacsys：N模拟集成电路 - 其他类型：SWITCHING CONTROLLER
控制模式：VOLTAGE-MODE控制技术：PULSE WIDTH MODULATION
最大输入电压：20 V最小输入电压：4.4 V
标称输入电压：12 VJESD-30 代码：R-PDSO-G14
JESD-609代码：e4长度：5 mm
湿度敏感等级：2功能数量：1
端子数量：14最高工作温度：105 °C
最低工作温度：-40 °C最大输出电流：4 A
封装主体材料：PLASTIC/EPOXY封装代码：HTSSOP
封装等效代码：TSSOP14,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Switching Regulator or Controllers表面贴装：YES
切换器配置：PUSH-PULL最大切换频率：500 kHz
技术：BICMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4.4 mm
Base Number Matches：1

UCC27223PWPRG4 数据手册

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SLUS558 − DECEMBER 2003  
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FEATURES  
APPLICATIONS  
D
Maximizes Efficiency by Minimizing  
Body-Diode Conduction and Reverse  
Recovery Losses  
D
D
Multiphase Converters in Combination With  
the TPS40090  
Non-Isolated 3.3-V, 5-V and 12-V Input  
dc-to-dc Converters for Processor Power,  
General Computer, Telecom and Datacom  
Applications  
D
Transparent Synchronous Buck Gate Drive  
Operation From the Single Ended PWM Input  
Signal  
D
D
D
D
D
12-V or 5-V Input Operation  
DESCRIPTION  
3.3-V Input Operation With Availability of  
12-V Bus Bias  
The UCC27223 is a high-speed synchronous  
buck drivers for today’s high-efficiency,  
lower-output voltage designs. Using Predictive  
Gate Drivet (PGD) control technology, these  
drivers reduce diode conduction and reverse  
recovery losses in the synchronous rectifier  
MOSFET(s).  
High-Side and Low-Side 3-A Dual Drivers  
On-Board 6.5-V Gate Drive Regulator  
3-A TrueDriveGate Drives for High  
Current Delivery at MOSFET Miller  
Thresholds  
D
D
Automatically Adjusts for Changing  
Operating Conditions  
The UCC27223 includes an enable pin that  
controls the operation of both outputs. A logic  
latch is also included to keep both outputs low until  
the first PWM input pulse comes in. The RDS(on)  
of the SR pull-down sourcing device is also  
minimized for higher frequency operations.  
Thermally Enhanced 14-Pin PowerPAD  
HTSSOP Package Minimizes Board Area and  
Junction Temperature Rise  
FUNCTIONAL APPLICATION DIAGRAM  
V
IN  
This closed loop feedback system detects  
body-diode conduction, and adjusts deadtime  
delays to minimize the conduction time interval.  
This virtually eliminates body-diode conduction  
while adjusting for temperature, load- dependent  
delays, and for different MOSFETs. Precise gate  
timing at the nanosecond level reduces the  
reverse recovery time of the synchronous rectifier  
MOSFET body-diode, reducing reverse recovery  
losses seen in the main (high-side) MOSFET. The  
lower junction temperature in the low-side  
MOSFET increases product reliability. Since the  
power dissipation is minimized, a higher switching  
frequency can also be used, allowing for smaller  
component sizes.  
UCC27223  
7
IN  
VHI 14  
PWM  
IN  
6,8 GND G1 13  
3
2
VDD  
V
OUT  
ENBL  
SW 11,12  
4,5 VLO  
G2 9,10  
The UCC27223 is offered in the thermally  
GND  
GND  
OUT  
IN  
enhanced 14-pin PowerPADt package with  
Note: 12-V input system shown. For 5-V input only systems, see Figure 6.  
2°C/W θ .  
jc  
Predictive Gate Drivet and PowerPADt are trademarks of Texas Instruments Incorporated.  
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Copyright 2003, Texas Instruments Incorporated  
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中文翻译

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UCC27223PWPRG4 替代型号

型号 品牌 替代类型 描述 数据表
UCC27223PWPR TI

完全替代

 HIGH-EFFICIENCY PREDICTIVE SYNCHRONOUS BUCK DRIVER WITH ENABLE
UCC27223PWP TI

完全替代

 HIGH-EFFICIENCY PREDICTIVE SYNCHRONOUS BUCK DRIVER WITH ENABLE
UCC27223PWPG4 TI

完全替代

 HIGH-EFFICIENCY PREDICTIVE SYNCHRONOUS BUCK DRIVER WITH ENABLE

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