Datasheet > UCC21520

UCC21520

更新时间： 2024-11-28 11:12:35

品牌	Logo	应用领域
德州仪器 - TI		栅极驱动驱动器
页数	文件大小	规格书
48页	2563K
描述
具有双输入、禁用引脚、8V UVLO 功能、采用 DW 封装的 5.7kVrms、4A/6A 双通道隔离式栅极驱动器

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UCC21520 数据手册

UCC21520, UCC21520A

SLUSCJ9E – JUNE 2016 – REVISED DECEMBER 2021

UCC21520 4-A, 6-A, 5.7-kV_RMSIsolated Dual-Channel Gate Driver

1 Features

3 Description

•

Universal: dual low-side, dual high-side or half-

bridge driver

Operating temperature range –40 to +125°C

Switching parameters:

– 19-ns typical propagation delay

– 10-ns minimum pulse width

– 5-ns maximum delay matching

– 6-ns maximum pulse-width distortion

Common-mode transient immunity (CMTI) greater

than 100 V/ns

The UCC21520 and the UCC21520A are isolated

dual-channel gate drivers with 4-A source and 6-A

sink peak current. It is designed to drive power

MOSFETs, IGBTs, and SiC MOSFETs up to 5-MHz

with best-in-class propagation delay and pulse-width

distortion.

•

The input side is isolated from the two output

drivers by a 5.7-kV_RMSreinforced isolation barrier,

with a minimum of 100-V/ns common-mode transient

immunity (CMTI). Internal functional isolation between

the two secondary-side drivers allows a working

•

Surge immunity up to 12.8 kV

Isolation barrier life >40 years

voltage of up to 1500 V_DC

4-A peak source, 6-A peak sink output

TTL and CMOS compatible inputs

3-V to 18-V input VCCI range to interface with both

digital and analog controllers

Up to 25-V VDD output drive supply

– 5-V and 8-V VDD UVLO options

Programmable overlap and dead time

Rejects input pulses and noise transients shorter

than 5 ns

Every driver can be configured as two low-side

drivers, two high-side drivers, or a half-bridge driver

with programmable dead time (DT). A disable pin

shuts down both outputs simultaneously when it is set

high, and allows normal operation when left open or

grounded. As a fail-safe measure, primary-side logic

failures force both outputs low.

•

Device Information⁽¹⁾

•

Fast disable for power sequencing

Industry standard wide body SOIC-16 (DW)

package

PART NUMBER

UCC21520DW

UCC21520ADW

PACKAGE

BODY SIZE (NOM)

DW SOIC (16) 10.30 mm × 7.50 mm

•

Safety-related certifications:

– 8000-V_PKreinforced Isolation per DIN V VDE V

0884-11:2017-01

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

– 5.7-kV_RMSisolation for 1 minute per UL 1577

– CSA certification per IEC 60950-1, IEC

62368-1, IEC 61010-1 and IEC 60601-1 end

equipment standards

VCCI 3,8

16 VDDA

15 OUTA

14 VSSA

Driver

DEMOD UVLO

MOD

INA

DIS

– CQC certification per GB4943.1-2011

2 Applications

Disable,

UVLO

and

13 NC

12 NC

Functional Isolation

•

HEV and BEV battery chargers

Isolated converters in DC-DC and AC-DC power

supplies

Server, telecom, it and industrial infrastructures

Motor drive and DC-to-AC solar inverters

LED lighting

Deadtime

11 VDDB

10 OUTB

Driver

INB

•

MOD

DEMOD UVLO

GND

VSSB

Inductive heating

Uninterruptible power supply (UPS)

Functional Block Diagram

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

12 3 4 5 6 7...48

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与UCC21520相关器件

型号	品牌	获取价格	描述	数据表
UCC21520ADW	TI	获取价格	具有双输入、禁用引脚、8V UVLO 功能、采用 DW 封装的 5.7kVrms、4A/6
UCC21520ADWR	TI	获取价格	具有双输入、禁用引脚、8V UVLO 功能、采用 DW 封装的 5.7kVrms、4A/6
UCC21520AQDWQ1	TI	获取价格	具有双输入、禁用引脚、死区时间的汽车类 4A/6A、5.7kVRMS 隔离式双通道栅极驱动
UCC21520AQDWRQ1	TI	获取价格	具有双输入、禁用引脚、死区时间的汽车类 4A/6A、5.7kVRMS 隔离式双通道栅极驱动
UCC21520DW	TI	获取价格	具有双输入、禁用引脚、8V UVLO 功能、采用 DW 封装的 5.7kVrms、4A/6
UCC21520DWR	TI	获取价格	具有双输入、禁用引脚、8V UVLO 功能、采用 DW 封装的 5.7kVrms、4A/6
UCC21520-Q1	TI	获取价格	具有双输入、禁用引脚、死区时间的汽车类 4A/6A、5.7kVRMS 隔离式双通道栅极驱动
UCC21520QDWQ1	TI	获取价格	具有双输入、禁用引脚、死区时间的汽车类 4A/6A、5.7kVRMS 隔离式双通道栅极驱动
UCC21520QDWRQ1	TI	获取价格	具有双输入、禁用引脚、死区时间的汽车类 4A/6A、5.7kVRMS 隔离式双通道栅极驱动
UCC21521	TI	获取价格	具有双输入、使能引脚、8V UVLO 且采用 LGA 封装的 5.7kVrms、4A/6A

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