Datasheet > UCC1580D-2

UCC1580D-2

更新时间： 2024-02-05 13:06:37

品牌	Logo	应用领域
其他 - ETC		模拟IC 开关光电二极管信息通信管理
页数	文件大小	规格书
10页	397K
描述
Analog IC

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UCC1580D-2 技术参数

生命周期：	Obsolete	包装说明：	SOIC-16
Reach Compliance Code：	unknown	风险等级：	5.84
Is Samacsys：	N	模拟集成电路 - 其他类型：	SWITCHING CONTROLLER
控制模式：	VOLTAGE-MODE	控制技术：	PULSE WIDTH MODULATION
最大输入电压：	14 V	最小输入电压：	9.5 V
标称输入电压：	12 V	JESD-30 代码：	R-PDSO-G16
功能数量：	1	端子数量：	16
最高工作温度：	125 °C	最低工作温度：	-55 °C
最大输出电流：	1.2 A	封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
认证状态：	Not Qualified	表面贴装：	YES
切换器配置：	SINGLE	最大切换频率：	430 kHz
技术：	BICMOS	温度等级：	MILITARY
端子形式：	GULL WING	端子位置：	DUAL
Base Number Matches：	1

UCC1580D-2 数据手册

UCC1580-1,-2,-3,-4

UCC2580-1,-2,-3,-4

UCC3580-1,-2,-3,-4

Single Ended Active Clamp/Reset PWM

FEATURES

DESCRIPTION

• Provides Auxiliary Switch Activation

Complementary to Main Power

Switch Drive

The UCC3580 family of PWM controllers is designed to implement a variety

of active clamp/reset and synchronous rectifier switching converter topolo-

gies. While containing all the necessary functions for fixed frequency, high

performance pulse width modulation, the additional feature of this design is

the inclusion of an auxiliary switch driver which complements the main

power switch, and with a programmable deadtime or delay between each

transition. The active clamp/reset technique allows operation of single

ended converters beyond 50% duty cycle while reducing voltage stresses

on the switches, and allows a greater flux swing for the power transformer.

This approach also allows a reduction in switching losses by recovering en-

ergy stored in parasitic elements such as leakage inductance and switch

capacitance.

• Programmable deadtime (Turn-on

Delay) Between Activation of Each

Switch

• Voltage Mode Control with

Feedforward Operation

• Programmable Limits for Both

Transformer Volt- Second Product

and PWM Duty Cycle

The oscillator is programmed with two resistors and a capacitor to set

switching frequency and maximum duty cycle. A separate synchronized

ramp provides a voltage feedforward pulse width modulation and a pro-

grammed maximum volt-second limit. The generated clock from the oscilla-

tor contains both frequency and maximum duty cycle information.

• High Current Gate Driver for Both

Main and Auxiliary Outputs

• Multiple Protection Features with

Latched Shutdown and Soft Restart

• Low Supply Current (100µA Startup,

1.5mA Operation)

(continued)

BLOCK DIAGRAM

UDG-95069-2

Pin Numbers refer to DIL-16 and SOIC-16 packages

SLUS292A - FEBRUARY 1999 - REVISED JANUARY 2002

12 3 4 5 6 7...10

中文翻译

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与UCC1580D-2相关器件

型号	品牌	获取价格	描述	数据表
UCC1580D-3	ETC	获取价格	Analog IC
UCC1580D-4	ETC	获取价格	Analog IC
UCC1580DTR-1	ETC	获取价格	Analog IC
UCC1580DTR-2	ETC	获取价格	Analog IC
UCC1580DTR-3	ETC	获取价格	Analog IC
UCC1580DTR-4	ETC	获取价格	Analog IC
UCC1580J-1	ETC	获取价格	Voltage-Mode SMPS Controller
UCC1580J-2	TI	获取价格	Single Ended Active Clamp/Reset PWM
UCC1580J-3	ETC	获取价格
UCC1580J-4	TI	获取价格	Single Ended Active Clamp/Reset PWM

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