Datasheet > 电源电路 > 开关式稳压器或控制器> UC3825BQR

UC3825BQR

更新时间： 2024-11-04 12:59:27

品牌	Logo	应用领域
德州仪器 - TI		控制器
页数	文件大小	规格书
19页	928K
描述
IC SWITCHING CONTROLLER, Switching Regulator or Controller

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中文翻译

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技术参数
数据手册

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UC3825BQR 技术参数

生命周期：	Obsolete	包装说明：	QCCN,
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.69
模拟集成电路 - 其他类型：	SWITCHING CONTROLLER	控制模式：	CURRENT/VOLTAGE-MODE
控制技术：	PULSE WIDTH MODULATION	最大输入电压：	20 V
最小输入电压：	12 V	JESD-30 代码：	S-PQCC-N20
功能数量：	1	端子数量：	20
最高工作温度：	70 °C	最低工作温度：
最大输出电流：	2 A	标称输出电压：	5.1 V
封装主体材料：	PLASTIC/EPOXY	封装代码：	QCCN
封装形状：	SQUARE	封装形式：	CHIP CARRIER
表面贴装：	YES	最大切换频率：	1150 kHz
温度等级：	COMMERCIAL	端子形式：	NO LEAD
端子位置：	QUAD	Base Number Matches：	1

UC3825BQR 数据手册

application

INFO

UC1825

UC2825

UC3825

available

High Speed PWM Controller

FEATURES

DESCRIPTION

•

Compatible with Voltage or Current Mode The UC1825 family of PWM control ICs is optimized for high fre-

Topologies

quency switched mode power supply applications. Particular care

was given to minimizing propagation delays through the comparators

and logic circuitry while maximizing bandwidth and slew rate of the

error amplifier. This controller is designed for use in either cur-

rent-mode or voltage mode systems with the capability for input volt-

age feed-forward.

•

Practical Operation Switching Frequencies

to 1MHz

•

50ns Propagation Delay to Output

High Current Dual Totem Pole Outputs

(1.5A Peak)

Protection circuitry includes a current limit comparator with a 1V

threshold, a TTL compatible shutdown port, and a soft start pin

which will double as a maximum duty cycle clamp. The logic is fully

latched to provide jitter free operation and prohibit multiple pulses at

an output. An under-voltage lockout section with 800mV of hysteresis

assures low start up current. During under-voltage lockout, the out-

puts are high impedance.

•

Wide Bandwidth Error Amplifier

Fully Latched Logic with Double Pulse

Suppression

•

Pulse-by-Pulse Current Limiting

Soft Start / Max. Duty Cycle Control

Under-Voltage Lockout with Hysteresis

Low Start Up Current (1.1mA)

These devices feature totem pole outputs designed to source and

sink high peak currents from capacitive loads, such as the gate of a

power MOSFET. The on state is designed as a high level.

BLOCK DIAGRAM

UDG-92030-2

SLUS235A - MARCH 1997 - REVISED MARCH 2004

12 3 4 5 6 7...19

中文翻译

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