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UC3824Q PDF预览

UC3824Q

更新时间: 2024-02-04 09:46:44
品牌 Logo 应用领域
其他 - ETC 开关控制器
页数 文件大小 规格书
8页 415K
描述
Current/Voltage-Mode SMPS Controller

UC3824Q 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:QCCJ, LDCC20,.4SQ
针数:20Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.69其他特性:ALSO OPERATES IN CURRENT MODE
模拟集成电路 - 其他类型:SWITCHING CONTROLLER控制模式:CURRENT/VOLTAGE-MODE
控制技术:PULSE WIDTH MODULATION最大输入电压:30 V
最小输入电压:10 V标称输入电压:15 V
JESD-30 代码:S-PQCC-J20长度:8.965 mm
功能数量:1端子数量:20
最高工作温度:70 °C最低工作温度:
最大输出电流:1.5 A封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC20,.4SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:4.57 mm子类别:Switching Regulator or Controllers
表面贴装:YES切换器配置:PUSH-PULL
最大切换频率:1000 kHz技术:BIPOLAR
温度等级:COMMERCIAL端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8.965 mm
Base Number Matches:1

UC3824Q 数据手册

 浏览型号UC3824Q的Datasheet PDF文件第2页浏览型号UC3824Q的Datasheet PDF文件第3页浏览型号UC3824Q的Datasheet PDF文件第4页浏览型号UC3824Q的Datasheet PDF文件第5页浏览型号UC3824Q的Datasheet PDF文件第6页浏览型号UC3824Q的Datasheet PDF文件第7页 
UC1824  
UC2824  
UC3824  
High Speed PWM Controller  
FEATURES  
DESCRIPTION  
Complementary Outputs  
The UC1824 family of PWM control ICs is optimized for high fre-  
quency switched mode power supply applications. Particular care  
was given to minimizing propagation delays through the comparators  
and logic circuitry while maximizing bandwidth and slew rate of the  
error amplifier. This controller is designed for use in either current-  
mode or voltage mode systems with the capability for input voltage  
feed-forward.  
Practical Operation Switching Frequencies  
to 1MHz  
50ns Propagation Delay to Output  
High Current Dual Totem Pole Outputs  
(1.5A Peak)  
Protection circuitry includes a current limit comparator with a 1V  
threshold, a TTL compatible shutdown port, and a soft start pin which  
will double as a maximum duty cycle clamp. The logic is fully latched  
to provide jitter free operation and prohibit multiple pulses at an out-  
put. An under-voltage lockout section with 800mV of hysteresis as-  
sures low start up current. During under-voltage lockout, the outputs  
are high impedance.  
Wide Bandwidth Error Amplifier  
Fully Latched Logic with Double Pulse  
Suppression  
Pulse-by-Pulse Current Limiting  
Soft Start / Max. Duty Cycle Control  
Under-Voltage Lockout with Hysteresis  
Low Start Up Current (1.1 mA)  
These devices feature totem pole outputs designed to source and  
sink high peak currents from capacitive loads, such as the gate of a  
power MOSFET. The on state is designed as a high level.  
±
Trimmed Bandgap Reference (5.1V 1%)  
BLOCK DIAGRAM  
UDG-92034-1  
3/97  
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