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UC3525AQG3

更新时间： 2024-01-28 05:50:16

品牌	Logo	应用领域
德州仪器 - TI		稳压器开关式稳压器或控制器电源电路开关式控制器脉冲
页数	文件大小	规格书
17页	747K
描述
REGULATING PULSE WIDTH MODULATORS

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技术参数
数据手册

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UC3525AQG3 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	QLCC	包装说明：	LCC-20
针数：	20	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.61	Is Samacsys：	N
模拟集成电路 - 其他类型：	SWITCHING CONTROLLER	控制模式：	VOLTAGE-MODE
控制技术：	PULSE WIDTH MODULATION	最大输入电压：	35 V
最小输入电压：	8 V	标称输入电压：	20 V
JESD-30 代码：	S-PQCC-J20	JESD-609代码：	e3
长度：	8.965 mm	湿度敏感等级：	2
功能数量：	1	端子数量：	20
最高工作温度：	70 °C	最低工作温度：
最大输出电流：	0.5 A	标称输出电压：	5.1 V
封装主体材料：	PLASTIC/EPOXY	封装代码：	QCCJ
封装等效代码：	LDCC20,.4SQ	封装形状：	SQUARE
封装形式：	CHIP CARRIER	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	座面最大高度：	4.57 mm
子类别：	Switching Regulator or Controllers	表面贴装：	YES
切换器配置：	PUSH-PULL	最大切换频率：	400 kHz
技术：	BIPOLAR	温度等级：	COMMERCIAL
端子面层：	Matte Tin (Sn)	端子形式：	J BEND
端子节距：	1.27 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	8.965 mm
Base Number Matches：	1

UC3525AQG3 数据手册

UC1525A, UC1527A

UC2525A, UC2527A

UC3525A, UC3527A

www.ti.com

SLUS191C–FEBRUARY 1997–REVISED JANUARY 2008

REGULATING PULSE WIDTH MODULATORS

FEATURES

DESCRIPTION

•

8-V to 35-V Operation

•

5.1-V Reference Trimmed to 1%

100-Hz to 500-kHz Oscillator Range

Separate Oscillator Sync Terminal

Adjustable Deadtime Control

Internal Soft-Start

The UC1525A/1527A series of pulse width modulator

integrated circuits are designed to offer improved

performance and lowered external parts count when

used in designing all types of switching power

supplies. The on-chip +5.1-V reference is trimmed to

1% and the input common-mode range of the error

amplifier includes the reference voltage, eliminating

external resistors. A sync input to the oscillator allows

multiple units to be slaved or a single unit to be

synchronized to an external system clock. A single

resistor between the C_Tand the discharge terminals

provides a wide range of dead-time adjustment.

These devices also feature built-in soft-start circuitry

with only an external timing capacitor required. A

shutdown terminal controls both the soft-start circuitry

and the output stages, providing instantaneous turn

off through the PWM latch with pulsed shutdown, as

well as soft-start recycle with longer shutdown

commands.

Pulse-by-Pulse Shutdown

Input Undervoltage Lockout With Hysteresis

Latching PWM to Prevent Multiple Pulses

Dual Source/Sink Output Drivers

BLOCK DIAGRAM

OSC

OUT

VREF

NOR

UVLO

Reference

Regulator

+VIN 15

Lockout

OUTPUT A

GROUND 12

To Internal

Circutry

SYNC

Flip

Flop

OSC

OUTPUT B

DISCHARGE

UC1525A

Output Stage

COMP

COMPENSATION 9

PWM

Latch

Error

Amp

OUTPUT A

REF

INV INPUT

NI INPUT

50 m

SOFTSTART

3 kW

SHUTDOWN 10

OUTPUT B

5 kW

UC1527A

Output Stage

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...17

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