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UC3525ANG4 PDF预览

UC3525ANG4

更新时间: 2024-11-11 12:02:03
品牌 Logo 应用领域
德州仪器 - TI 脉冲
页数 文件大小 规格书
17页 747K
描述
REGULATING PULSE WIDTH MODULATORS

UC3525ANG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:8 weeks
风险等级:5.13模拟集成电路 - 其他类型:SWITCHING CONTROLLER
控制模式:VOLTAGE-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:35 V最小输入电压:8 V
标称输入电压:20 VJESD-30 代码:R-PDIP-T16
JESD-609代码:e4长度:19.3 mm
功能数量:1端子数量:16
最高工作温度:70 °C最低工作温度:
最大输出电流:0.5 A最大输出电压:5.2 V
最小输出电压:5 V标称输出电压:5.1 V
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:3.9 mm
子类别:Switching Regulator or Controllers表面贴装:NO
切换器配置:PUSH-PULL最大切换频率:400 kHz
技术:BIPOLAR温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.35 mm
Base Number Matches:1

UC3525ANG4 数据手册

 浏览型号UC3525ANG4的Datasheet PDF文件第2页浏览型号UC3525ANG4的Datasheet PDF文件第3页浏览型号UC3525ANG4的Datasheet PDF文件第4页浏览型号UC3525ANG4的Datasheet PDF文件第5页浏览型号UC3525ANG4的Datasheet PDF文件第6页浏览型号UC3525ANG4的Datasheet PDF文件第7页 
UC1525A, UC1527A  
UC2525A, UC2527A  
UC3525A, UC3527A  
www.ti.com  
SLUS191CFEBRUARY 1997REVISED JANUARY 2008  
REGULATING PULSE WIDTH MODULATORS  
1
FEATURES  
DESCRIPTION  
8-V to 35-V Operation  
5.1-V Reference Trimmed to 1%  
100-Hz to 500-kHz Oscillator Range  
Separate Oscillator Sync Terminal  
Adjustable Deadtime Control  
Internal Soft-Start  
The UC1525A/1527A series of pulse width modulator  
integrated circuits are designed to offer improved  
performance and lowered external parts count when  
used in designing all types of switching power  
supplies. The on-chip +5.1-V reference is trimmed to  
1% and the input common-mode range of the error  
amplifier includes the reference voltage, eliminating  
external resistors. A sync input to the oscillator allows  
multiple units to be slaved or a single unit to be  
synchronized to an external system clock. A single  
resistor between the CT and the discharge terminals  
provides a wide range of dead-time adjustment.  
These devices also feature built-in soft-start circuitry  
with only an external timing capacitor required. A  
shutdown terminal controls both the soft-start circuitry  
and the output stages, providing instantaneous turn  
off through the PWM latch with pulsed shutdown, as  
well as soft-start recycle with longer shutdown  
commands.  
Pulse-by-Pulse Shutdown  
Input Undervoltage Lockout With Hysteresis  
Latching PWM to Prevent Multiple Pulses  
Dual Source/Sink Output Drivers  
BLOCK DIAGRAM  
OSC  
OUT  
VREF  
16  
4
13  
11  
VC  
NOR  
NOR  
UVLO  
Reference  
Regulator  
+VIN 15  
Lockout  
OUTPUT A  
GROUND 12  
To Internal  
Circutry  
SYNC  
RT  
3
6
5
7
Flip  
Flop  
OSC  
14  
OUTPUT B  
CT  
DISCHARGE  
UC1525A  
Output Stage  
13  
11  
VC  
R
COMP  
S
OR  
COMPENSATION 9  
PWM  
Latch  
Error  
Amp  
V
OUTPUT A  
REF  
INV INPUT  
NI INPUT  
1
2
8
S
A
50 m  
SOFTSTART  
OR  
3 kW  
SHUTDOWN 10  
14  
OUTPUT B  
5 kW  
UC1527A  
Output Stage  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1997–2008, Texas Instruments Incorporated  

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