Datasheet > UC3173ADWTR

UC3173ADWTR

更新时间： 2024-11-05 23:38:55

品牌	Logo	应用领域
其他 - ETC		驱动器光电二极管电动机控制电机控制器
页数	文件大小	规格书
12页	527K
描述
Servo Motor Controller/Driver

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UC3173ADWTR 数据手册

UC3173A

Full Bridge Power Amplifier

FEATURES

DESCRIPTION

• Precision Current Control

This full bridge power amplifier, rated for continuous output current of

0.55A, is intended for use in demanding servo applications such as head

positioning for high density disk drives. This device includes a precision cur-

rent sense amplifier that senses load current with a single resistor in series

with the load. The UC3173A is optimized to consume a minimum of supply

current, and is designed to operate in both 5V and 12V systems. The power

output stages have a low saturation voltage and are protected with current

limiting and thermal shutdown. When inhibited the device will draw less

than 1.5mA of total supply current.

•

500mA Load Current

• 1.3V Typical Total V

at 550mA

SAT

• Controlled Velocity Head Parking

• Precision Dual Supply Monitor with

Indicator

• Range Control for 4:1 Gain Change

Auxiliary functions on this device include a dual input undervoltage com-

parator, which can monitor two independent supply voltages and activate

the built in head park function when either is below minimum. The park cir-

cuitry allows a programmable retract voltage to be applied to the load for

limiting maximum head velocity. A separate low side parking drive pin per-

mits a series impedance to be inserted to control maximum retract current.

The parking drive function can be configured to operate with supply volt-

ages as low as 1.2V.

• Compensation Adjust Pin for

Bandwidth Control

• Inhibit Input and UVLO

• 5V or 12V Operation

• 12mA Quiescent Supply Current

• PLCC, SOIC, and Low Profile Quad

The closed loop transconductance of the configured power amplifier can be

switched between a high and low range with a logic input. The 4:1 change

in gain can be used to extend the dynamic range of the servo loop. Band-

width variations that would otherwise result with the gain change can be

controlled with a compensation adjust pin.

Flat Pack Packages

BLOCK DIAGRAM

UDG-94039

04/99

12 3 4 5 6 7...12

中文翻译

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