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UC285N

更新时间： 2024-11-23 20:30:23
品牌 Logo 应用领域
德州仪器 - TI /
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9页 474K
描述
UC285N

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中文翻译

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UC285N 技术参数

生命周期：ObsoleteReach Compliance Code：unknown
风险等级：5.84Is Samacsys：N
Base Number Matches：1

UC285N 数据手册

 浏览型号UC285N的Datasheet PDF文件第2页浏览型号UC285N的Datasheet PDF文件第3页浏览型号UC285N的Datasheet PDF文件第4页浏览型号UC285N的Datasheet PDF文件第5页浏览型号UC285N的Datasheet PDF文件第6页浏览型号UC285N的Datasheet PDF文件第7页 
UC1861-1868  
UC2861-2868  
UC3861-3868  
Resonant-Mode Power Supply Controllers  
FEATURES  
DESCRIPTION  
• Controls Zero Current Switched (ZCS) The UC1861-1868 family of ICs is optimized for the control of Zero Cur-  
or Zero Voltage Switched (ZVS)  
Quasi-Resonant Converters  
rent Switched and Zero Voltage Switched quasi-resonant converters. Dif-  
ferences between members of this device family result from the various  
combinations of UVLO thresholds and output options. Additionally, the  
one-shot pulse steering logic is configured to program either on-time for  
ZCS systems (UC1865-1868), or off-time for ZVS applications (UC1861-  
1864).  
• Zero-Crossing Terminated One-Shot  
Timer  
• Precision 1%, Soft-Started 5V  
Reference  
The primary control blocks implemented include an error amplifier to com-  
pensate the overall system loop and to drive a voltage controlled oscillator  
(VCO), featuring programmable minimum and maximum frequencies. Trig-  
gered by the VCO, the one-shot generates pulses of a programmed maxi-  
mum width, which can be modulated by the Zero Detection comparator.  
This circuit facilitates “true” zero current or voltage switching over various  
line, load, and temperature changes, and is also able to accommodate the  
resonant components' initial tolerances.  
• Programmable Restart Delay  
Following Fault  
• Voltage-Controlled Oscillator (VCO)  
with Programmable Minimum and  
Maximum Frequencies from 10kHz to  
1MHz  
• Low Start-Up Current (150µA typical)  
• Dual 1 Amp Peak FET Drivers  
Under-Voltage Lockout is incorporated to facilitate safe starts upon  
power-up. The supply current during the under-voltage lockout period is  
typically less than 150µA, and the outputs are actively forced to the low  
• UVLO Option for Off-Line or DC/DC  
Applications  
state.  
(continued)  
Device  
UVLO  
1861  
1862  
1863  
36014  
1864  
36014  
1865  
1866  
1867  
36014  
1868  
36014  
16.5/10.5  
Alternating  
Off Time  
16.5/10.5  
Parallel  
Off Time  
16.5/10.5  
Alternating  
On Time  
16.5/10.5  
Parallel  
On Time  
Outputs  
“Fixed”  
Alternating  
Off Time  
Parallel  
Off Time  
Alternating  
On Time  
Parallel  
On Time  
BLOCK DIAGRAM  
UDG-92018  
Pin numbers refer to the J and N packages.  
10/98  
1234567...9

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