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UC2824Q

更新时间： 2024-11-04 19:59:11
品牌 Logo 应用领域
德州仪器 - TI 开关
页数 文件大小 规格书
14页 699K
描述
2A SWITCHING CONTROLLER, 1000kHz SWITCHING FREQ-MAX, PQCC20

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中文翻译

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UC2824Q 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QLCC
包装说明：QCCJ, LDCC20,.4SQ针数：20
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.65
其他特性：ALSO OPERATES IN CURRENT MODE模拟集成电路 - 其他类型：SWITCHING CONTROLLER
控制模式：CURRENT/VOLTAGE-MODE控制技术：PULSE WIDTH MODULATION
最大输入电压：30 V最小输入电压：10 V
标称输入电压：15 VJESD-30 代码：S-PQCC-J20
长度：8.965 mm功能数量：1
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C最大输出电流：1.5 A
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC20,.4SQ封装形状：SQUARE
封装形式：CHIP CARRIER峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：Not Qualified座面最大高度：4.57 mm
子类别：Switching Regulator or Controllers表面贴装：YES
切换器配置：PUSH-PULL最大切换频率：1000 kHz
技术：BIPOLAR温度等级：INDUSTRIAL
端子形式：J BEND端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：8.965 mmBase Number Matches：1

UC2824Q 数据手册

 浏览型号UC2824Q的Datasheet PDF文件第2页浏览型号UC2824Q的Datasheet PDF文件第3页浏览型号UC2824Q的Datasheet PDF文件第4页浏览型号UC2824Q的Datasheet PDF文件第5页浏览型号UC2824Q的Datasheet PDF文件第6页浏览型号UC2824Q的Datasheet PDF文件第7页 
UC1824  
UC2824  
UC3824  
www.ti.com  
SLUS326A–MARCH 1997–REVISED JULY 2007  
HIGH SPEED PWM CONTROLLER  
FEATURES  
DESCRIPTION  
•
Complementary Outputs  
The UC1824 family of PWM control devices is  
optimized for high frequency switched mode power  
supply applications. Particular care was given to  
•
Practical Operation Switching Frequencies to  
1 MHz  
minimizing  
propagation  
delays  
through  
the  
•
•
50-ns Propagation Delay to Output  
comparators and logic circuitry while maximizing  
bandwidth and slew rate of the error amplifier. This  
controller is designed for use in either current mode  
or voltage mode systems with the capability for input  
voltage feed-forward.  
High Current Dual Totem Pole Outputs (1.5 A  
Peak)  
•
•
Wide Bandwidth Error Amplifier  
Fully Latched Logic With Double Pulse  
Suppression  
Protection circuitry includes  
a
current limit  
comparator with a 1-V threshold, a TTL compatible  
shutdown port, and a soft-start pin which doubles as  
a maximum duty cycle clamp. The logic is fully  
latched to provide jitter free operation and prohibit  
multiple pulses at an output. An under-voltage  
lockout section with 800 mV of hysteresis assures  
low start up current. During under-voltage lockout,  
the outputs are high impedance.  
•
•
•
•
•
Pulse-by-Pulse Current Limiting  
Soft Start/Maximum Duty Cycle Control  
Under-Voltage Lockout with Hysteresis  
Low Start Up Current (1.1 mA)  
Trimmed Bandgap Reference (5.1 V ± 1%)  
BLOCK DIAGRAM  
Clock  
RT  
4
5
OSC  
PWM Latch (Set Dom.)  
R
CT  
6
1.25V  
Ramp  
7
3
S
E/A Out  
Wide Bandwidth  
(Set Dom.)  
NI  
2
1
+
VIN  
Error  
Amp  
INV  
Inhibit  
9mA  
13 VC  
11 Out  
Soft Start  
8
9
ILIM  
CPRTR  
14 INVOUT  
1V  
12 Pwr Gnd  
Shutdown  
CPRTR  
ILIM/SD  
1.4V  
Output  
Inhibit  
Internal  
Bias  
VCC 15  
9V  
4V  
UVLO  
VCC Good  
VREF Good  
REF  
GEN  
Gnd 10  
GATE  
10 VREF 5.1V  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1997–2007, Texas Instruments Incorporated  
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