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UC1854ADWTR PDF预览

UC1854ADWTR

更新时间: 2024-10-02 13:15:07
品牌 Logo 应用领域
德州仪器 - TI 稳压器
页数 文件大小 规格书
13页 474K
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UC1854ADWTR 数据手册

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UC1854  
UC2854  
UC3854  
High Power Factor Preregulator  
FEATURES  
DESCRIPTION  
Control Boost PWM to 0.99 Power Factor  
The UC1854 provides active power factor correction for power sys-  
tems that otherwise would draw non-sinusoidal current from sinusoi-  
dal power lines. This device implements all the control functions  
necessary to build a power supply capable of optimally using available  
power-line current while minimizing line-current distortion. To do this,  
the UC1854 contains a voltage amplifier, an analog multiplier/divider,  
a current amplifier, and a fixed-frequency PWM. In addition, the  
UC1854 contains a power MOSFET compatible gate driver, 7.5V ref-  
erence, line anticipator, load-enable comparator, low-supply detector,  
and over-current comparator.  
Limit Line Current Distortion To <5%  
World-Wide Operation Without Switches  
Feed-Forward Line Regulation  
Average Current-Mode Control  
Low Noise Sensitivity  
Low Start-Up Supply Current  
Fixed-Frequency PWM Drive  
Low-Offset Analog Multiplier/Divider  
1A Totem-Pole Gate Driver  
The UC1854 uses average current-mode control to accomplish fixed-  
frequency current control with stability and low distortion. Unlike peak  
current-mode, average current control accurately maintains sinusoidal  
line current without slope compensation and with minimal response to  
noise transients.  
The UC1854’s high reference voltage and high oscillator amplitude  
minimize noise sensitivity while fast PWM elements permit chopping  
frequencies above 200kHz. The UC1854 can be used in single and  
three phase systems with line voltages that vary from 75 to 275 volts  
and line frequencies across the 50Hz to 400Hz range. To reduce the  
burden on the circuitry that supplies power to this device, the UC1854  
features low starting supply current.  
Precision Voltage Reference  
These devices are available packaged in 16-pin plastic and ceramic  
dual in-line packages, and a variety of surface-mount packages.  
BLOCK DIAGRAM  
UDG-92055  
6/98  

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