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U637256 PDF预览

U637256

更新时间: 2024-11-09 03:57:31
品牌 Logo 应用领域
SIMTEK 静态存储器
页数 文件大小 规格书
14页 255K
描述
CapStore 32K x 8 nvSRAM

U637256 数据手册

 浏览型号U637256的Datasheet PDF文件第2页浏览型号U637256的Datasheet PDF文件第3页浏览型号U637256的Datasheet PDF文件第4页浏览型号U637256的Datasheet PDF文件第5页浏览型号U637256的Datasheet PDF文件第6页浏览型号U637256的Datasheet PDF文件第7页 
U637256  
CapStore 32K x 8 nvSRAM  
Not Recommend For New Designs  
Features  
Description  
integrity.  
‡
CMOS non volatile static RAM  
32768 x 8 bits  
70 ns Access Time  
35 ns Output Enable Access  
Time  
The U637256 has two separate  
modes of operation: SRAM mode  
and nonvolatile mode. In SRAM  
mode, the memory operates as an  
ordinary static RAM. In nonvolatile  
operation, data is transferred in  
parallel from SRAM to EEPROM or  
from EEPROM to SRAM. In this  
mode SRAM functions are disab-  
led.  
The U637256 is a static RAM with  
a nonvolatile electrically erasable  
PROM (EEPROM) element incor-  
porated in each static memory cell.  
The SRAM can be read and written  
an unlimited number of times, while  
independent nonvolatile data resi-  
des in EEPROM. Data transfers  
from the SRAM to the EEPROM  
(the STORE operation) take place  
automatically upon power down  
using charge stored in an integraed  
capacitor. Transfers from the  
EEPROM to the SRAM (the  
RECALL operation) take place  
automatically on power up. The  
U637256 combines the ease of use  
STORE cycles also may be initia-  
ted under user control via a soft-  
ware sequence.  
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Once a STORE cycle is initiated,  
further input or output are disabled  
until the cycle is completed.  
Because a sequence of addresses  
is used for STORE initiation, it is  
important that no other read or  
write accesses intervene in the  
sequence or the sequence will be  
aborted.  
RECALL cycles may also be initia-  
ted by a software sequence.  
Internally, RECALL is a two step  
procedure. First, the SRAM data is  
cleared and second, the nonvola-  
tile information is transferred into  
the SRAM cells.  
The RECALL operation in no way  
alters the data in the EEPROM  
cells. The nonvolatile data can be  
recalled an unlimited number of  
times.  
The U637256 is pin compatible  
with standard SRAMs and standard  
battery backed SRAMs.  
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ICC = 15 mA typ. at 200 ns Cycle  
Time  
Unlimited Read and Write Cycles  
to SRAM  
Automatic STORE to EEPROM  
on Power Down using charge  
stored in an integrated capacitor  
Software initiated STORE  
Automatic STORE Timing  
106 STORE cycles to EEPROM  
100 years data retention in  
EEPROM  
Automatic RECALL on Power Up  
Software RECALL Initiation  
Unlimited RECALL cycles from  
EEPROM  
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Single 5 V ± 10 % Operation  
Operating temperature range:  
0 to 70 °C  
-40 to 85°C  
‡
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QS 9000 Quality Standard  
(MIL STD 883C M3015.7)  
RoHS compliance and Pb- free  
Package: PDIP28 (600 mil)  
of an SRAM with nonvolatile data  
Pin Description  
Pin Configuration  
1
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
VCC  
2
W
3
A13  
A8  
Signal Name Signal Description  
4
5
A0 - A14  
Address Inputs  
Data In/Out  
A9  
6
A11  
G
DQ0 - DQ7  
7
Chip Enable  
E
PDIP  
8
A10  
Output Enable  
Write Enable  
Power Supply Voltage  
Ground  
G
9
E
W
10  
11  
DQ7  
DQ6  
VCC  
VSS  
DQ0  
DQ1  
DQ2  
VSS  
12  
13  
14  
17  
16  
15  
DQ5  
DQ4  
DQ3  
Top View  
August 15, 2006  
STK Control #ML0054  
1
Rev 1.1  

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