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U634H256BD1C25G1 PDF预览

U634H256BD1C25G1

更新时间: 2024-02-03 22:02:08
品牌 Logo 应用领域
SIMTEK 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
14页 241K
描述
Non-Volatile SRAM, 32KX8, 25ns, CMOS, PDIP32, 0.600 INCH, PLASTIC, DIP-32

U634H256BD1C25G1 技术参数

生命周期:Obsolete包装说明:DIP,
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.64
最长访问时间:25 nsJESD-30 代码:R-PDIP-T32
JESD-609代码:e3长度:41.91 mm
内存密度:262144 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:8功能数量:1
端子数量:32字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32KX8封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:4.83 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子面层:MATTE TIN
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:15.24 mmBase Number Matches:1

U634H256BD1C25G1 数据手册

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U634H256  
PowerStore 32K x 8 nvSRAM  
Packages:PDIP32 (600 mil)  
SOP32 (300 mil)  
Transfers from the EEPROM to the  
SRAM (the RECALL operation) take  
place automatically on power up.  
The U634H256 combines the high  
performance and ease of use of a  
fast SRAM with nonvolatile data  
Features  
High-performance CMOS non-  
Description  
volatile static RAM 32768 x 8 bits  
25, 35 and 45 ns Access Times  
10, 15 and 20 ns Output Enable  
Access Times  
ICC = 15 mA at 200 ns Cycle Time  
Automatic STORE to EEPROM  
on Power Down using external  
capacitor  
The U634H256 has two separate  
modes of operation: SRAM mode  
and nonvolatile mode. In SRAM  
mode, the memory operates as an  
ordinary static RAM. In nonvolatile  
operation, data is transferred in  
parallel from SRAM to EEPROM or  
from EEPROM to SRAM. In this  
mode SRAM functions are disab-  
led.  
integrity.  
STORE cycles also may be initiated  
under user control via a software  
sequence or via a single pin (HSB).  
Once a STORE cycle is initiated,  
further input or output are disabled  
until the cycle is completed.  
Because a sequence of addresses  
is used for STORE initiation, it is  
important that no other read or write  
accesses intervene in the sequence  
or the sequence will be aborted.  
RECALL cycles may also be initia-  
ted by a software sequence.  
Internally, RECALL is a two step  
procedure. First, the SRAM data is  
cleared and second, the nonvolatile  
information is transferred into the  
SRAM cells.  
The RECALL operation in no way  
alters the data in the EEPROM  
cells. The nonvolatile data can be  
recalled an unlimited number of  
times.  
Hardware or Software initiated  
STORE  
(STORE Cycle Time < 10 ms)  
Automatic STORE Timing  
105 STORE cycles to EEPROM  
10 years data retention in  
EEPROM  
Automatic RECALL on Power Up  
Software RECALL Initiation  
(RECALL Cycle Time < 20 µs)  
Unlimited RECALL cycles from  
EEPROM  
The U634H256 is a fast static RAM  
(25, 35, 45 ns), with a nonvolatile  
electrically  
erasable  
PROM  
(EEPROM) element incorporated  
in each static memory cell. The  
SRAM can be read and written an  
unlimited number of times, while  
independent nonvolatile data resi-  
des in EEPROM. Data transfers  
from the SRAM to the EEPROM  
(the STORE operation) take place  
automatically upon power down  
using charge stored in an external  
100 µF capacitor.  
Single 5 V ± 10 % Operation  
Operating temperature ranges:  
0 to 70 °C  
-40 to 85 °C  
CECC 90000 Quality Standard  
ESD characterization according  
MIL STD 883C M3015.7-HBM  
(classification see IC Code  
Numbers)  
Pin Configuration  
Pin Description  
VCAP  
A14  
A12  
A7  
1
2
3
4
5
6
7
8
VCCX  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
Signal Name Signal Description  
HSB  
W
A0 - A14  
Address Inputs  
Data In/Out  
A13  
A8  
DQ0 - DQ7  
A6  
A5  
A9  
Chip Enable  
E
A4  
A11  
Output Enable  
Write Enable  
PDIP  
SOP  
G
A3  
G
W
n.c.  
A2  
9
10  
n.c.  
A10  
E
VCCX  
VSS  
VCAP  
Power Supply Voltage  
Ground  
A1  
A0  
DQ0  
DQ1  
DQ2  
VSS  
11  
12  
13  
14  
15  
16  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
Capacitor  
Hardware Controlled Store/Busy  
HSB  
Top View  
181  
December 12, 1997  

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