Datasheet > TSP7N65M

TSP7N65M

更新时间： 2024-11-22 17:15:27

品牌	Logo	应用领域
信安 - TRUESEMI		/
页数	文件大小	规格书
9页	1213K
描述
TO-220

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TSP7N65M 数据手册

TSP7N65M/TSF7N65M

650V N-Channel MOSFET

General Description

Features

This Power MOSFET is produced using Truesemi‘s

advanced planar stripe DMOS technology.

• 7A,650V,Max.R_DS(on)=1.6Ω @ V_GS=10V

• Low gate charge(typical 29nC)

• High ruggedness

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. These devices are well

suited for high efficiency switched mode power supplies,

active power factor correction based on half bridge

topology.

Absolute Maximum Ratings

T_C=25℃ unless otherwise specified

TSP7N65M

TSF7N65M

Symbol

Parameter

Units

V_DSS

Drain-Source Voltage

Gate-Source Voltage

650

V_GS

± 30

T_C= 25℃

T_C= 100℃

(Note 1)

(Note 2)

(Note 1)

(Note 3)

I_D

Drain Current

4.5

4.5*

30*

I_DM

E_AS

Pulsed Drain Current

Single Pulsed Avalanche Energy

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

V/ns

260

14.7

4.5

E_AR

dv/dt

147

Power Dissipation (T_C= 25℃)

-Derate above 25℃

P_D

T_J, T_STG

T_L

W/℃

℃

1.18

0.38

Operating and Storage Temperature Range

-55 to +150

Maximum lead temperature for soldering purposes,

1/8” from case for 5 seconds

℃

300

* Drain current limited by maximum junction temperature.

Thermal Resistance Characteristics

TSP7N65M

TSF7N65M

Symbol

Parameter

Units

R_θJC

Thermal Resistance,Junction-to-Case

0.85

0.5

2.6

℃/W

Thermal Resistance,Case-to-Sink Typ.

Thermal Resistance,Junction-to-Ambient

℃/W

R_θCS

R_θJA

62.5

Ver.C1

www.truesemi.com

12 3 4 5 6 7...9

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