TSP8N65M/TSF8N65M
650V N-Channel MOSFET
General Description
Features
This Power MOSFET is produced using Truesemi‘s
advanced planar stripe DMOS technology.
• 7.5A,650V,Max.RDS(on)=1.50 Ω @ VGS =10V
• Low gate charge(typical 29nC)
• High ruggedness
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction based on half bridge
topology.
Absolute Maximum Ratings
TC=25℃ unless otherwise specified
TSP8N65M
TSF8N65M
Symbol
VDSS
Parameter
Units
V
Drain-Source Voltage
Gate-Source Voltage
650
VGS
V
± 30
TC = 25℃
TC = 100℃
(Note 1)
(Note 2)
(Note 1)
(Note 3)
A
7.5
4.5
30
7.5*
4.5*
30*
ID
Drain Current
A
IDM
EAS
Pulsed Drain Current
A
Single Pulsed Avalanche Energy
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
mJ
mJ
V/ns
W
260
14.7
4.5
EAR
dv/dt
90
68
Power Dissipation (TC = 25℃)
-Derate above 25℃
PD
TJ, TSTG
TL
W/℃
℃
1.18
0.38
Operating and Storage Temperature Range
-55 to +150
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
℃
300
* Drain current limited by maximum junction temperature.
Thermal Resistance Characteristics
TSP8N65M
TSF8N65M
Symbol
Parameter
Units
RθJC
1.39
0.5
1.84
Thermal Resistance,Junction-to-Case
℃/W
Thermal Resistance,Case-to-Sink Typ.
Thermal Resistance,Junction-to-Ambient
--
℃/W
℃/W
RθCS
RθJA
62.5
62.5
Ver.C2-1
© 2018 Truesemi Semiconductor Corporation
www.truesemi.com