Datasheet > TSF18N50MR

TSF18N50MR

更新时间： 2024-09-25 17:15:55

品牌	Logo	应用领域
信安 - TRUESEMI		/
页数	文件大小	规格书
7页	970K
描述
TO-220F

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中文翻译

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TSF18N50MR 数据手册

TSF18N50MR

500V N-Channel MOSFET

General Description

Features

This Power MOSFET is produced using Truesemi‘s

advanced planar stripe DMOS technology.

• 18.0A,500V,Max.R_DS(on)=0.32 Ω @ V_GS=10V

• Low gate charge(typical 45nC)

• High ruggedness

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. These devices are well

suited for high efficiency switched mode power supplies,

active power factor correction based on half bridge

topology.

Absolute Maximum Ratings

T_C=25℃ unless otherwise specified

Value

500

Symbol

V_DSS

Parameter

Units

Drain-Source Voltage

Gate-Source Voltage

V_GS

± 30

18*

T_C= 25℃

T_C= 100℃

(Note 1)

(Note 2)

(Note 1)

(Note 3)

I_D

Drain Current

10.8*

72*

I_DM

E_AS

Pulsed Drain Current

Single Pulsed Avalanche Energy

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

V/ns

945

E_AR

23.5

dv/dt

4.5

38.5

Power Dissipation (T_C= 25℃)

-Derate above 25℃

P_D

T_J, T_STG

T_L

W/℃

℃

0.3

Operating and Storage Temperature Range

Maximum lead temperature for soldering purposes,

1/8” from case for 5 seconds

-55 to +150

℃

300

* Drain current limited by maximum junction temperature.

Thermal Resistance Characteristics

Value

3.3

Symbol

Parameter

Units

℃/W

R_θJC

Thermal Resistance,Junction-to-Case

Thermal Resistance,Case-to-Sink Typ.

R_θCS

R_θJA

Thermal Resistance,Junction-to-Ambient

62.5

℃/W

Ver.B2

www.truesemi.com

12 3 4 5 6 7

中文翻译

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