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TSF16N50MR PDF预览

TSF16N50MR

更新时间: 2024-11-13 17:15:15
品牌 Logo 应用领域
信安 - TRUESEMI /
页数 文件大小 规格书
6页 767K
描述
TO-220F

TSF16N50MR 数据手册

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TSF16N50MR  
500V N-Channel MOSFET  
General Description  
Features  
This Power MOSFET is produced using Truesemi‘s  
advanced planar stripe DMOS technology.  
• 16.0A,500V,Max.RDS(on)=0.4 Ω @ VGS =10V  
• Low gate charge(typical 32nC)  
• High ruggedness  
• Fast switching  
• 100% avalanche tested  
• Improved dv/dt capability  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the  
avalanche and commutation mode. These devices are well  
suited for high efficiency switched mode power supplies,  
active power factor correction based on half bridge  
topology.  
Absolute Maximum Ratings  
TC=25unless otherwise specified  
Value  
500  
Symbol  
VDSS  
Parameter  
Units  
V
Drain-Source Voltage  
Gate-Source Voltage  
VGS  
V
± 30  
16*  
TC = 25  
TC = 100℃  
(Note 1)  
(Note 2)  
(Note 1)  
(Note 3)  
A
ID  
Drain Current  
A
9.6*  
IDM  
EAS  
Pulsed Drain Current  
A
64*  
Single Pulsed Avalanche Energy  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
mJ  
mJ  
V/ns  
W
780  
EAR  
20  
dv/dt  
4.5  
38.5  
0.3  
Power Dissipation (TC = 25)  
-Derate above 25℃  
PD  
TJ, TSTG  
TL  
W/℃  
Operating and Storage Temperature Range  
Maximum lead temperature for soldering purposes,  
1/8” from case for 5 seconds  
-55 to +150  
300  
* Drain current limited by maximum junction temperature.  
Thermal Resistance Characteristics  
Value  
3.3  
Symbol  
Parameter  
Units  
/W  
/W  
RθJC  
Thermal Resistance,Junction-to-Case  
Thermal Resistance,Case-to-Sink Typ.  
--  
RθCS  
RθJA  
Thermal Resistance,Junction-to-Ambient  
62.5  
/W  
© 2018 Truesemi Semiconductor Corporation  
Ver.B2  
www.truesemi.com  

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