Datasheet > TSF12N65M

TSF12N65M

更新时间： 2024-11-13 17:15:51

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信安 - TRUESEMI		/
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TO-220F

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TSF12N65M 数据手册

TSP12N65M/TSF12N65M

650V N-Channel MOSFET

General Description

Features

This Power MOSFET is produced using Truesemi‘s

advanced planar stripe DMOS technology.

• 12A,650V,Max.R_DS(on)=0.75 Ω @ V_GS=10V

• Low gate charge(typical 52nC)

• High ruggedness

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. These devices are well

suited for high efficiency switched mode power supplies,

active power factor correction based on half bridge

topology.

Absolute Maximum Ratings

T_C=25℃ unless otherwise specified

TSP12N65M TSF12N65M

Symbol

Parameter

Units

V_DSS

Drain-Source Voltage

Gate-Source Voltage

650

V_GS

± 30

T_C= 25℃

T_C= 100℃

(Note 1)

(Note 2)

(Note 1)

(Note 3)

7.4

12*

7.4*

48*

I_D

Drain Current

I_DM

E_AS

I_AR

Pulsed Drain Current

Single Pulsed Avalanche Energy

Avalanche Current

865

E_AR

dv/dt

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

V/ns

23.1

4.5

231

Power Dissipation (T_C= 25℃)

-Derate above 25℃

P_D

T_J, T_STG

T_L

W/℃

℃

1.85

0.43

Operating and Storage Temperature Range

-55 to +150

Maximum lead temperature for soldering purposes,

1/8” from case for 5 seconds

℃

300

* Drain current limited by maximum junction temperature.

Thermal Resistance Characteristics

TSP12N65M TSF12N65M

Symbol

Parameter

Units

R_θJC

Thermal Resistance,Junction-to-Case

0.54

0.5

2.33

℃/W

Thermal Resistance,Case-to-Sink Typ.

Thermal Resistance,Junction-to-Ambient

℃/W

R_θCS

R_θJA

62.5

Ver.C1

www.truesemi.com

12 3 4 5 6 7...9

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