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TSB81BA3DPFP PDF预览

TSB81BA3DPFP

更新时间: 2024-01-24 20:06:39
品牌 Logo 应用领域
德州仪器 - TI 线路驱动器或接收器驱动程序和接口接口集成电路
页数 文件大小 规格书
59页 846K
描述
IEEE 139b THREE-PORT CABLE TRANSCEIVER/ARBITER

TSB81BA3DPFP 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:HTFQFP, TQFP80,.55SQ针数:80
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.7差分输出:YES
驱动器位数:6输入特性:DIFFERENTIAL
接口集成电路类型:LINE TRANSCEIVER接口标准:IEEE 1394
JESD-30 代码:S-PQFP-G80JESD-609代码:e4
长度:12 mm湿度敏感等级:3
功能数量:6端子数量:80
最高工作温度:85 °C最低工作温度:-40 °C
最小输出摆幅:0.172 V最大输出低电流:0.004 A
封装主体材料:PLASTIC/EPOXY封装代码:HTFQFP
封装等效代码:TQFP80,.55SQ封装形状:SQUARE
封装形式:FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:1.8,3.3 V认证状态:Not Qualified
最大接收延迟:接收器位数:6
座面最大高度:1.2 mm子类别:Line Driver or Receivers
最大供电电压:2.05 V最小供电电压:1.85 V
标称供电电压:1.95 V电源电压1-最大:3.6 V
电源电压1-分钟:3 V电源电压1-Nom:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:12 mmBase Number Matches:1

TSB81BA3DPFP 数据手册

 浏览型号TSB81BA3DPFP的Datasheet PDF文件第2页浏览型号TSB81BA3DPFP的Datasheet PDF文件第3页浏览型号TSB81BA3DPFP的Datasheet PDF文件第4页浏览型号TSB81BA3DPFP的Datasheet PDF文件第5页浏览型号TSB81BA3DPFP的Datasheet PDF文件第6页浏览型号TSB81BA3DPFP的Datasheet PDF文件第7页 
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ꢉ ꢊ ꢊꢊ ꢄ ꢆ ꢋ ꢌ ꢍ ꢀ ꢎꢏꢊꢊ ꢐꢑꢒ ꢏꢀ ꢓꢅꢂ ꢔꢊ ꢀ ꢏꢅꢕꢁ ꢓꢊꢉ ꢖꢊꢏ ꢗꢅ ꢏ ꢂꢉ ꢀ ꢊꢏ  
SLLS559E − DECEMBER 2002 − REVISED JUNE 2006  
D
D
Fully Supports Provisions of IEEE P1394b  
Revision 1.33+ at 1-Gigabit Signaling Rates  
D
Data Interface to Link-Layer Controller Pin  
Selectable From 1394a−2000 Mode (2/4/8  
Parallel Bits at 49.152 MHz) or 1394b Mode  
(8 Parallel Bits at 98.304 MHz)  
Fully Supports Provisions of IEEE  
1394a−2000 and 1394−1995 Standard for  
High Performance Serial Bus  
D
D
D
Interface to Link-Layer Controller Supports  
Low Cost TI Bus-Holder Isolation  
D
D
Fully Interoperable With Firewire, i.LINK,  
and SB1394, Implementation of IEEE Std  
1394  
Interoperable With Link-Layer Controllers  
Using 3.3-V Supplies  
Provides Three Fully Backward  
Interoperable With Other 1394 Physical  
Layers (PHYs) Using 1.8-V, 3.3-V, and 5-V  
Supplies  
Compatible, (1394a−2000 Fully Compliant)  
Bilingual P1394b Cable Ports at up to  
800 Megabits per Second (Mbits/s)  
D
Low Jitter, External Crystal Oscillator  
Provides Transmit and Receive Data at  
100/200/400/800 Mbits/s, and Link-Layer  
Controller Clock at 49.152 MHz and  
98.304 MHz  
D
D
Provides Three 1394a−2000 Fully  
Compliant Cable Ports at 100/200/400  
Mbits/s  
Full 1394a−2000 Support Includes:  
− Connection Debounce  
− Arbitrated Short Reset  
− Multispeed Concatenation  
− Arbitration Acceleration  
− Fly-By Concatenation  
− Port Disable/Suspend/Resume  
− Extended Resume Signaling for  
Compatibility With Legacy DV Devices  
D
D
Separate Bias (TPBIAS) for Each Port  
Low Cost, High Performance 80-Pin TQFP  
(PFP) Thermally Enhanced Package  
D
Software Device Reset (SWR)  
D
Fail-Safe Circuitry Senses Sudden Loss of  
Power to the Device and Disables the Ports  
to Ensure That the TSB81BA3D Does Not  
Load the TPBIAS of Any Connected Device  
and Blocks any Leakage From the Port  
Back to Power Plane  
D
Power-Down Features to Conserve Energy  
in Battery Powered Applications  
D
Low-Power Sleep Mode  
D
D
The TSB81BA3D Has a 1394a−2000  
Compliant Common-Mode Noise Filter on  
the Incoming Bias Detect Circuit to Filter  
Out Cross-Talk Noise  
D
Fully Compliant With Open Host Controller  
Interface (HCI) Requirements  
D
D
D
Cable Power Presence Monitoring  
Cable Ports Monitor Line Conditions for  
Active Connection to Remote Node  
The TSB81BA3D Is Port Programmable to  
Force 1394a Mode to Allow Use of 1394a  
Connectors (1394b Signalling Must Not Be  
Put Across 1394a Connectors or Cables)  
Register Bits Give Software Control of  
Contender Bit, Power Class Bits, Link  
Active Control Bit, and 1394a−2000  
Features  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Implements technology covered by one or more patents of Apple Computer, Incorporated and SGS Thompson, Limited.  
i.LINK is a trademark of Sony Corporation.  
FireWire is a trademark of Apple Computer Incorporated.  
ꢀꢤ  
Copyright 2002 − 2006, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢭ ꢜꢛ ꢟ ꢦꢦ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢨ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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