Datasheet > TS81102G0MFS9NB2

TS81102G0MFS9NB2

更新时间： 2024-02-27 21:41:09

品牌	Logo	应用领域
爱特美尔 - ATMEL		电信电信集成电路
页数	文件大小	规格书
31页	431K
描述
Telecom Circuit, 1-Func, CQFP196, CERAMIC, QFP-196

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技术参数
数据手册

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TS81102G0MFS9NB2 技术参数

生命周期：	Active	零件包装代码：	QFP
包装说明：	HQFP,	针数：	196
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.12	JESD-30 代码：	S-CQFP-G196
长度：	33.91 mm	功能数量：	1
端子数量：	196	最高工作温度：	125 °C
最低工作温度：	-55 °C	封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	HQFP	封装形状：	SQUARE
封装形式：	FLATPACK, HEAT SINK/SLUG	认证状态：	Not Qualified
座面最大高度：	3.4 mm	标称供电电压：	5 V
表面贴装：	YES	电信集成电路类型：	TELECOM CIRCUIT
温度等级：	MILITARY	端子形式：	GULL WING
端子节距：	0.635 mm	端子位置：	QUAD
宽度：	33.91 mm	Base Number Matches：	1

TS81102G0MFS9NB2 数据手册

Main Features

• Programmable DMUX Ratio:

– 1:4 Data Rate Max = 750 Msps

– P_D(8b/10b) < 4.3/4.7W (ECL 50Ω Output)

– 1:8 Data Rate Max = 1.5 Gsps

– P_D(8b/10b) < 6/6.9W (ECL 50Ω Output)

– 1:16 with 1 TS8388B or 1 TS83102G0 and 2 DMUX

• Parallel Output Mode

• 8/10-bit

DMUX 8/10-bit

1:4/1:8 1.5 Gsps

• ECL Differential Input Data

• Data Ready or Data Ready/2 Input Clock

• Input Clock Sampling Delay Adjust

• Single-ended Output Data:

– Adjustable Common Mode and Swing

– Logic Threshold Reference Output

– ECL, PECL, TTL

TS81102G0FS

• Asynchronous Reset

• Synchronous Reset

• ADC and DMUX Multi-channel Applications:

– Stand-alone Delay Adjust Cell for ADCs Sampling Instant Alignment

• Differential Data Ready Output

• Built-in Self Test (BIST)

• Dual Power Supply V_EE= -5V, V_CC= 5V

• Radiation Tolerance Oriented Design (More Than 100 Krad (Si) Expected)

• Thermally Enhanced CQFP196 Cavity Up Package

Screening

• Temperature Range:

– C Grade: 0°C < Tc; Tj < 90°C

– V Grade: -40°C < Tc; Tj < 110°C

– M Grade: -55°C < Tc; Tj < 125°C

• Standard Screening Level for “C”, “V” and “M” Grades

• ESA SCC 9000 Space Screening Flow for “M” Grade (on Request)

1. Description

The TS81102G0 is a monolithic 10-bit high-speed (up to 1.5 Gsps) demultiplexer. The

DMUX is designed to run with all kinds of ADCs and more specifically, it fits perfectly

with Atmel high speed ADC 8-bit 1 Gsps TS8388B, ADC 10-bit 2 Gsps TS83102G0B.

The TS81102G0 is using a well proven architecture, including a delay control and tun-

able output levels.

This DMUX allows users to process the high speed output data stream down to stan-

dard signal processors speed (standard FPGAs).

5344A–BDC–07/05

12 3 4 5 6 7...31

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