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TS80C31X2-MJBR PDF预览

TS80C31X2-MJBR

更新时间: 2024-09-21 09:35:15
品牌 Logo 应用领域
爱特美尔 - ATMEL 时钟ATM异步传输模式微控制器外围集成电路
页数 文件大小 规格书
42页 601K
描述
Microcontroller, 8-Bit, 40MHz, CMOS, PQCC44, PLASTIC, LCC-44

TS80C31X2-MJBR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:LCC
包装说明:QCCJ,针数:44
Reach Compliance Code:compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.67
具有ADC:NO地址总线宽度:16
位大小:8最大时钟频率:40 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:8JESD-30 代码:S-PQCC-J44
JESD-609代码:e3长度:16.5862 mm
湿度敏感等级:2I/O 线路数量:32
端子数量:44最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:NO
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):245认证状态:Not Qualified
座面最大高度:4.57 mm速度:40 MHz
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:16.5862 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER

TS80C31X2-MJBR 数据手册

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TS80C31X2  
8-bit CMOS Microcontroller ROMless  
1. Description  
TS80C31X2 is high performance CMOS and ROMless The fully static design of the TS80C31X2 allows to  
reduce system power consumption by bringing the clock  
frequency down to any value, even DC, without loss of  
data.  
versions of the 80C51 CMOS single chip 8-bit  
microcontroller.  
The TS80C31X2 retains all features of the TSC80C31  
with 128 bytes of internal RAM, a 5-source, 4 priority  
level interrupt system, an on-chip oscilator and two timer/  
counters.  
The TS80C31X2 has 2 software-selectable modes of  
reduced activity for further reduction in power  
consumption. In the idle mode the CPU is frozen while  
the timers, the serial port and the interrupt system are still  
operating. In the power-down mode the RAM is saved  
and all other functions are inoperative.  
In addition, the TS80C31X2 has a dual data pointer, a  
more versatile serial channel that facilitates  
multiprocessor communication (EUART) and a X2 speed  
improvement mechanism.  
2. Features  
80C31 Compatible  
Interrupt Structure with  
8031 pin and instruction compatible  
Four 8-bit I/O ports  
5 Interrupt sources,  
4 priority level interrupt system  
Two 16-bit timer/counters  
128 bytes scratchpad RAM  
Full duplex Enhanced UART  
Framing error detection  
Automatic address recognition  
High-Speed Architecture  
40 MHz @ 5V, 30MHz @ 3V  
Power Control modes  
Idle mode  
X2 Speed Improvement capability (6 clocks/  
machine cycle)  
Power-down mode  
Power-off Flag  
30 MHz @ 5V, 20 MHz @ 3V (Equivalent to  
60 MHz @ 5V, 40 MHz @ 3V)  
Once mode (On-chip Emulation)  
Power supply: 4.5-5.5V, 2.7-5.5V  
Dual Data Pointer  
Asynchronous port reset  
Temperature ranges: Commercial (0 to 70oC) and  
Industrial (-40 to 85oC)  
Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP F1  
(13.9 footprint)  
Rev. C - 15 January, 2001  
1

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