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TS68302MRB/C16

更新时间： 2024-09-16 22:24:27
品牌 Logo 应用领域
爱特美尔 - ATMEL 微控制器和处理器外围集成电路异步传输模式ATM时钟
页数 文件大小 规格书
47页 1143K
描述
Integrated Multiprotocol Processor IMP

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中文翻译

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TS68302MRB/C16 技术参数

是否Rohs认证： 不符合生命周期：Transferred
零件包装代码：PGA包装说明：PGA, PGA132,13X13
针数：132Reach Compliance Code：unknown
ECCN代码：3A001.A.2.CHTS代码：8542.31.00.01
风险等级：5.46具有ADC：NO
地址总线宽度：24位大小：16
最大时钟频率：16.67 MHzDAC 通道：NO
DMA 通道：YES外部数据总线宽度：16
JESD-30 代码：S-CPGA-P132JESD-609代码：e0
长度：34.544 mmI/O 线路数量：28
端子数量：132最高工作温度：125 °C
最低工作温度：-55 °CPWM 通道：NO
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：PGA
封装等效代码：PGA132,13X13封装形状：SQUARE
封装形式：GRID ARRAY电源：5 V
认证状态：Not Qualified筛选级别：MIL-STD-883 Class B
座面最大高度：5.1 mm速度：16.67 MHz
子类别：Other Microprocessor ICs最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：NO技术：HCMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：PIN/PEG端子节距：2.54 mm
端子位置：PERPENDICULAR宽度：34.544 mm
uPs/uCs/外围集成电路类型：MICROCONTROLLER, RISCBase Number Matches：1

TS68302MRB/C16 数据手册

 浏览型号TS68302MRB/C16的Datasheet PDF文件第2页浏览型号TS68302MRB/C16的Datasheet PDF文件第3页浏览型号TS68302MRB/C16的Datasheet PDF文件第4页浏览型号TS68302MRB/C16的Datasheet PDF文件第5页浏览型号TS68302MRB/C16的Datasheet PDF文件第6页浏览型号TS68302MRB/C16的Datasheet PDF文件第7页 
Features  
• TS68000/TS68008 Microprocessor Core Supporting a 16- or 8-bit TS68000 Family  
• System Integration Block Including:  
– Independent Direct Memory Access (IDMA) Controller  
– Interrupt Controller with Two Modes of Operation  
– Parallel Input/output (I/O) Ports, some with Interrupt Capability  
– On-chip Usable 1152 bytes of Dual-port Random-access Memory (RAM)  
– Three Timers, including a Watchdog Timer  
– Four Programmable Chip-select Lines with Wait-state Logic  
– Programmable Address Mapping of Dual-port RAM and IMP Registers  
– On-chip Clock Generator with an Output Clock Signal  
– System Control:  
Integrated  
Multiprotocol  
Processor (IMP)  
System Control Register  
Bus Arbitration Logic with Low Interrupt Latency Support  
Hardware Watchdog for Monitoring Bus Activity  
Low Power (Standby) Modes  
Disable CPU Logic (TS68000)  
Freeze Control for Debugging Selected On-chip Peripherals  
DRAM Refresh Controller  
TS68302  
• Communications Processor Including:  
– Main Controller (RISC Processor)  
– Three Full-duplex Serial Communication Controllers (SCCs)  
– Six Serial Direct Memory Access (SDMA) Channels Dedicated to the Three SCCs  
– Flexible Physical Interface Accessible by SCCs for Interchip Digital Link (IDL)  
General Circuit Interface (GCI, see note), Pulse Code Modulation (PCM), and  
Nonmultiplexed Serial Interface (NMSI) Operation  
– Serial Communication Port (SCP) for Synchronous Communication, Clock Rate up  
to 4.096 MHz  
– Serial Management Controllers (SMCs) for IDL and GCI Channels  
• Frequency of Operation: 16.67 MHz  
• Power Supply: 5 VDC 10%  
Description  
The IMP is a very large-scale integration (VLSI) device incorporating the main building  
blocks needed for the design of a wide variety of controllers. The device is especially  
suitable to applications in the communications industry. The IMP is the first device to  
offer the benefits of a closely coupled, industry-standard, TS68000/TS68008 micro-  
processor core and a flexible communications architecture. This multichannel  
communications device may be configured to support a number of popular industry  
interfaces, including those for the integrated services digital network (ISDN) basic rate  
and terminal adapter applications. Through a combination of architectural and pro-  
grammable features, concurrent operation of different protocols is easily achieved  
using the IMP. Data concentrators, line cards, bridges, and gateways are examples of  
suitable applications for this versatile device.  
The IMP is a high-density complementary metal-oxide semiconductor (HCMOS)  
device consisting of a TS68000/TS68008 microprocessor core, a system integration  
block (SIB), and a communications processor (CP). The TS68302 block diagram is  
shown in Figure 1.  
Note:  
GCI is sometimes referred to as IOM2.  
Rev. 2117A–HIREL–11/02  
1234567...47

中文翻译

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