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TS68302MR1B/T16 PDF预览

TS68302MR1B/T16

更新时间: 2024-11-06 22:09:27
品牌 Logo 应用领域
爱特美尔 - ATMEL /
页数 文件大小 规格书
47页 1143K
描述
Integrated Multiprotocol Processor IMP

TS68302MR1B/T16 数据手册

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Features  
TS68000/TS68008 Microprocessor Core Supporting a 16- or 8-bit TS68000 Family  
System Integration Block Including:  
– Independent Direct Memory Access (IDMA) Controller  
– Interrupt Controller with Two Modes of Operation  
– Parallel Input/output (I/O) Ports, some with Interrupt Capability  
– On-chip Usable 1152 bytes of Dual-port Random-access Memory (RAM)  
– Three Timers, including a Watchdog Timer  
– Four Programmable Chip-select Lines with Wait-state Logic  
– Programmable Address Mapping of Dual-port RAM and IMP Registers  
– On-chip Clock Generator with an Output Clock Signal  
– System Control:  
Integrated  
Multiprotocol  
Processor (IMP)  
System Control Register  
Bus Arbitration Logic with Low Interrupt Latency Support  
Hardware Watchdog for Monitoring Bus Activity  
Low Power (Standby) Modes  
Disable CPU Logic (TS68000)  
Freeze Control for Debugging Selected On-chip Peripherals  
DRAM Refresh Controller  
TS68302  
Communications Processor Including:  
– Main Controller (RISC Processor)  
– Three Full-duplex Serial Communication Controllers (SCCs)  
– Six Serial Direct Memory Access (SDMA) Channels Dedicated to the Three SCCs  
– Flexible Physical Interface Accessible by SCCs for Interchip Digital Link (IDL)  
General Circuit Interface (GCI, see note), Pulse Code Modulation (PCM), and  
Nonmultiplexed Serial Interface (NMSI) Operation  
– Serial Communication Port (SCP) for Synchronous Communication, Clock Rate up  
to 4.096 MHz  
– Serial Management Controllers (SMCs) for IDL and GCI Channels  
Frequency of Operation: 16.67 MHz  
Power Supply: 5 VDC 10%  
Description  
The IMP is a very large-scale integration (VLSI) device incorporating the main building  
blocks needed for the design of a wide variety of controllers. The device is especially  
suitable to applications in the communications industry. The IMP is the first device to  
offer the benefits of a closely coupled, industry-standard, TS68000/TS68008 micro-  
processor core and a flexible communications architecture. This multichannel  
communications device may be configured to support a number of popular industry  
interfaces, including those for the integrated services digital network (ISDN) basic rate  
and terminal adapter applications. Through a combination of architectural and pro-  
grammable features, concurrent operation of different protocols is easily achieved  
using the IMP. Data concentrators, line cards, bridges, and gateways are examples of  
suitable applications for this versatile device.  
The IMP is a high-density complementary metal-oxide semiconductor (HCMOS)  
device consisting of a TS68000/TS68008 microprocessor core, a system integration  
block (SIB), and a communications processor (CP). The TS68302 block diagram is  
shown in Figure 1.  
Note:  
GCI is sometimes referred to as IOM2.  
Rev. 2117A–HIREL–11/02  

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