TS555M

更新时间： 2024-09-15 22:41:59

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
12页	87K
描述
LOW POWER SINGLE CMOS TIMERS

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中文翻译

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数据手册

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TS555M 数据手册

TS555C,I,M

LOW POWER SINGLE CMOS TIMERS

VERYLOW POWER CONSUMPTION :

100µA typ at V_CC= 5V

HIGH MAXIMUM ASTABLE FREQUENCY

2.7MHz

PIN-TO-PIN AND FUNCTIONALLY

COMPATIBLE WITH BIPOLAR NE555

VOLTAGERANGE : +2V to +18V

HIGH OUTPUT CURRENT CAPABILITY

SUPPLY CURRENT SPIKES REDUCED

DURING OUTPUT TRANSITIONS

HIGH INPUT IMPEDANCE : 10¹²Ω

OUTPUT COMPATIBLE WITH TTL,CMOS

AND LOGIC MOS

DIP8

(Plastic Package)

SO8

(Plastic Micropackage)

TSSOP8

(Thin Shrink Small Outline Package)

ORDER CODES

Package

Temperature

Range

Part Number

●

TS555C

TS555I

0^oC, +70^oC

-40, +125^oC

-55, +125^oC

TS555M

Examples : TS555CD , TS555IN

PIN CONNECTIONS (top view)

DESCRIPTION

The TS555 is a single CMOS timer which offers

very low consumption (Icc_(TYP)TS555 = 100µA

Icc_(TYP)NE555 = 3mA) and high frequency

(f_(max.)TS555 = 2.7MHz - f_(max.)NE555 = 0.1 MHz)

Thus, eitherin Monostable or Astablemode,timing

remains very accurate.

GND

Trigger

Output

Reset

Discharge

Threshold

Control

Voltage

The TS555provides reducedsupply current spikes

during output transitions, which enablesthe use of

lower decoupling capacitors compared to those

required by bipolar NE555.

Timing capacitors can also be minimized due to

high input impedance (10¹²Ω).

January 1999

1/12

12 3 4 5 6 7...12

中文翻译

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