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TS27M2IPT PDF预览

TS27M2IPT

更新时间: 2024-11-23 12:03:35
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 运算放大器放大器电路光电二极管
页数 文件大小 规格书
14页 205K
描述
Low-power CMOS dual operational amplifiers

TS27M2IPT 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:SOIC包装说明:ROHS COMPLIANT, TSSOP-8
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.33.00.01
风险等级:5.51Is Samacsys:N
放大器类型:OPERATIONAL AMPLIFIER架构:VOLTAGE-FEEDBACK
最大平均偏置电流 (IIB):0.0003 µA标称共模抑制比:80 dB
频率补偿:YES最大输入失调电压:12000 µV
JESD-30 代码:R-PDSO-G8JESD-609代码:e4
长度:4.4 mm低-偏置:YES
低-失调:NO微功率:YES
湿度敏感等级:1负供电电压上限:
标称负供电电压 (Vsup):功能数量:2
端子数量:8最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
功率:NO电源:5/10 V
可编程功率:NO认证状态:Not Qualified
座面最大高度:1.2 mm标称压摆率:0.6 V/us
子类别:Operational Amplifier最大压摆率:0.3 mA
供电电压上限:18 V标称供电电压 (Vsup):10 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:10
标称均一增益带宽:1000 kHz最小电压增益:10000
宽带:NO宽度:3 mm
Base Number Matches:1

TS27M2IPT 数据手册

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TS27M2, TS27M2A, TS27M2B  
Low-power CMOS dual operational amplifiers  
Features  
Wide supply voltage range: 3 to 16 V  
Ultra-low consumption: 150 µA/op typ  
Output voltage swing to ground  
N
DIP8  
(Plastic package)  
Excellent phase margin on capacitive load  
Gain bandwidth product: 1 MHz typ  
Vio down to 2 mV max. (B version)  
Description  
D
SO-8  
The TS27x2 series are low-cost and low-power  
dual operational amplifiers designed to operate  
with high-voltage single or dual supplies. These  
operational amplifiers use the ST silicon gate  
CMOS process, providing an excellent  
(Plastic micropackage)  
consumption-speed ratio thanks to three different  
power consumptions, making them ideal for low-  
consumption applications:  
I
I
I
= 10 µA/amp: TS27L2 (very low power),  
= 150 µA/amp: TS27M2 (low power) and  
= 1 mA/amp: TS272 (high speed)  
CC  
CC  
CC  
P
TSSOP8  
(Thin shrink small outline package)  
The devices also offer a very high input  
impedance and extremely low input currents.  
Their main advantage compared to JFET devices  
is the very low input current drift with temperature  
(Figure 3).  
Pin connections (top view)  
Out1  
In1-  
1
2
3
4
8
7
6
5
VCC+  
Out2  
In2-  
_
+
_
+
In1+  
VCC-  
In2+  
August 2009  
Doc ID 2306 Rev 2  
1/14  
www.st.com  
14  

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