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TRF2052PW PDF预览

TRF2052PW

更新时间: 2024-10-27 22:19:11
品牌 Logo 应用领域
德州仪器 - TI 信号电路锁相环或频率合成电路光电二极管信息通信管理
页数 文件大小 规格书
9页 132K
描述
LOW-VOLTAGE 2-GHz SYNTHESIZER

TRF2052PW 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SOP-20Reach Compliance Code:not_compliant
风险等级:8.75Is Samacsys:N
JESD-30 代码:R-PDSO-G20长度:6.5 mm
端子数量:20最高工作温度:55 °C
最低工作温度:-10 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:3 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:PLL or Frequency Synthesis Circuits
标称供电电压 (Vsup):3 V表面贴装:YES
技术:BICMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

TRF2052PW 数据手册

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TRF2052  
LOW-VOLTAGE 2-GHz SYNTHESIZER  
SLWS066 – JULY 1998  
PW PACKAGE  
(TOP VIEW)  
3-V Power Supply Operation  
2-GHz Operation  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Normal and Speed-Up Charge Pumps  
Dual PLL: One RF and One IF  
CLOCK  
DATA  
STROBE  
VSS  
RFINP  
RFINN  
VCCP  
REFIN  
RA  
VDD  
NENM  
LOCK  
NENA  
RN  
VDDA  
PHP  
PHI  
VSSA  
PHA  
Additional, Directly Accessible  
Power-Down Modes  
description  
The TRF2052 is a dual-channel, low-power,  
phase-locked loop (PLL) frequency synthesizer  
component designed specifically for digitally en-  
hanced cordless telephone (DECT) applications.  
The device is suitable for a variety of applications  
AUXIN  
up through 2 GHz. A speed-up integral charge pump is used for fast channel switching. The simple serial  
interface is compatible with the extended performance mode (EPM) of other devices in Texas Instruments’  
synthesizer family.  
Along with the external loop filters, the TRF2052 provides all functions for voltage-controlled oscillators (VCO)  
in a dual-PLL frequency synthesizer system. A main channel is provided for RF frequencies and an auxiliary  
channel for IF frequencies. The current-output charge pumps directly drive passive RC filter networks, to  
generate VCO control voltages. Fast main-channel frequency switching is achieved with a charge pump  
arrangement that increases the current drive and alters the loop-filter frequency response during a portion of  
the switching interval.  
The speed-up mode is controlled by the serial interface strobe signal, which goes high when a new frequency  
is loaded. At this time, the internal speed-up timer is activated and it enables the speed-up mode into the  
speed-up timer for the preprogrammed duration. During speed-up mode, the charge pump current to the  
external loop filter can be changed in two ways. First, the main charge pump current can be increased. Second,  
an additional integral charge pump can be separately and directly connected to the external loop-filter capacitor  
to further decrease the loop-filter charge and discharge times.  
Caution. These devices have limited built-in gate protection. The leads should be shorted together or the device placed in conductive  
foam during storage or handling to prevent electrostatic damage to the MOS gates.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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