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TRF1223IRTMR PDF预览

TRF1223IRTMR

更新时间: 2024-02-20 03:15:55
品牌 Logo 应用领域
德州仪器 - TI 放大器功率放大器
页数 文件大小 规格书
13页 324K
描述
3.3-GHz To 3.8-GHz 1-W Power Amplifier

TRF1223IRTMR 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:LCC32,.2SQ,20
Reach Compliance Code:compliantFactory Lead Time:1 week
风险等级:5.79特性阻抗:50 Ω
构造:COMPONENT增益:26 dB
最大输入功率 (CW):20 dBmJESD-609代码:e3
安装特点:SURFACE MOUNT功能数量:1
端子数量:32最大工作频率:3800 MHz
最小工作频率:3300 MHz最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装等效代码:LCC32,.2SQ,20电源:5 V
射频/微波设备类型:NARROW BAND MEDIUM POWER子类别:RF/Microwave Amplifiers
最大压摆率:950 mA表面贴装:YES
端子面层:Matte Tin (Sn)Base Number Matches:1

TRF1223IRTMR 数据手册

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TRF1223  
www.ti.com  
SLWS166CAPRIL 2005REVISED MARCH 2007  
3.3-GHz To 3.8-GHz 1-W Power Amplifier  
FEATURES  
VPOS  
VNEG  
1 W P-1dB Linear, 30-dB Gain Transmitter  
Operates Over the 3300-MHz to 3800-MHz  
Range  
Power  
Supply  
VDD  
PACNT  
LP  
Two TTL Controlled, 1-Bit, 16-dB Gain Steps  
for 32 dB of Total Gain Control  
Power Amp /  
Attenuator  
Driver  
Amplifier  
Pre-Amp  
Superior Linearity (+45 dBm IP3) Over the  
Entire Frequency Range  
RFI  
RFO  
Auto-Bias Design With PA Enable  
Temperature Compensated Directional  
Coupler Detector  
DETN  
DETP  
Low Power Bias Mode  
Internally Matched 50-Input and Output  
PAGAIN1  
PAGAIN0  
DESCRIPTION  
The TRF1223 is a highly integrated linear transmitter / power amplifier (PA) MMIC. The chip has two 16-dB gain  
steps that provide a total of 32-dB gain control via 1-bit TTL control signals. The chip also integrates a TTL mute  
function that turns off the amplifiers for power critical or TDD applications. A temperature compensated detector  
is included for output power monitor or ALC applications. The chip has a P1dB of +30 dBm and a third order  
intercept of +45 dBm.  
The TRF1223 is designed to function as a part of Texas Instruments complete 3.5-GHz chip set. The TRF1223  
is the output power amplifier or a driver amplifier for higher power applications. The linear nature of the  
transmitter makes it ideal for complex modulations schemes such as high order QAM or OFDM.  
KEY SPECIFICATIONS  
OP1dB = +30 dBm  
Output IP3 = +45 dBm, Typical  
Gain = 30 dB, Typical  
Gain Flatness over Transmit Band ±2 dB  
Frequency Range = 3300 MHz to 3800 MHz  
±0.5-dB Detected Output Voltage vs Temperature  
BLOCK DIAGRAM  
The detailed block diagram and the pin-out of the ASIC are shown in Figure 1.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2005–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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