TRF1121
TRF1221
www.ti.com
SLWS170B–APRIL 2005–REVISED JANUARY 2008
Dual VCO/PLL Synthesizer With IF Upconverter
The TRF1121 and TRF1221 are designed to function
as part of complete 2.5-GHz and 3.5-GHz radio
chipsets, respectively. In the chipset, the transmit
chain operates as a double upconverter from an IF
frequency input (typically from a baseband modem's
DAC) to an RF output frequency. The TRF1121/
TRF1221 performs the first upconversion from IF
signals in the range of 10 MHz to 60 MHz to a
second IF frequency in the range of 300 MHz to
360 MHz. The radio chipset features sufficient
linearity, phase noise, and dynamic range to work in
either single carrier or multicarrier, line-of-sight or
non-line-of-sight, standard (IEEE 802.16), or
proprietary systems. Due to the modular nature of the
chipset, it is ideal for use in systems that employ
transmit or receive diversity.
1
FEATURES
•
Low Phase Noise
•
•
Image Reject Upconverter
Dual VCO/PLL For Double Upconversion
Architecture
•
On-Chip VCO, Resonator, and PLL Only;
Requires Off-Chip Loop Filter
•
•
External S-Band VCO Option
5-Bit Transmit Level Control, 32 dB in 1-dB
Steps
•
S-Band LO Frequency Range:
–
–
TRF1121: 1500 to 2500 MHz
TRF1221: 1700 to 3600 MHz
•
UHF LO Frequency Range: 250 MHz to
350 MHz
LPCC−48 PACKAGE
(TOP VIEW)
•
•
Input Frequency Range: 10 MHz to 70 MHz
S-Band LO Phase Noise Typical 0.5° rms (100
Hz to 1 MHz)
•
•
•
Output Power Range From –32 dBm to 0 dBm
in 1-dB Steps (500-mVpp Differential Input)
36
35
34
33
32
31
30
29
28
27
26
25
1
CP2O
LD2
EXTLO2IP
EXTLO2IN
TXON
Minimum UHF LO Step Size of 50 kHz for
TRF1121 and 62.5 kHz for TRF1221
2
3
LF2
4
DATA
CLK
IFOP
Image Rejection: –50 dBc, Typical (20–40 MHz
Tx IF Input)
5
VCCIF
IFON
6
VCCD2
FR
•
•
LO Leakage: –36 dBm, Typical
7
GND
8
VCCD1
FRBP
EN
GND
Third-Order IMD: < –60 dBc at Maximum Gain
9
GAIN[4]
GAIN[3]
GAIN[2]
GAIN[1]
10
11
12
DESCRIPTION
LF1
LD1
The TRF1121 and TRF1221 are VHF-UHF
upconverters with integrated UHF and S-band
frequency synthesizers for radio applications in the
2-GHz to 4-GHz range. The IC performs the first
upconversion and generates the local oscillator (LO)
for the second upconversion. The device uniquely
integrates an image reject mixer, IF gain blocks, 5-bit
gain control, and two complete phase-locked-loop
(PLL) circuits including: VCOs, resonator circuit,
varactors, dividers, and phase detectors.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005–2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.