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TPS74201RGRT PDF预览

TPS74201RGRT

更新时间： 2024-11-09 13:14:55
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德州仪器 - TI 软启动
页数 文件大小 规格书
26页 979K
描述
1.5-A, low-VIN (0.8-V), low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator 20-VQFN -40 to 125

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TPS74201RGRT 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active包装说明：HVQCCN,
Reach Compliance Code：compliantFactory Lead Time：6 weeks
风险等级：2.2可调性：ADJUSTABLE
最大回动电压 1：0.1 V标称回动电压 1：0.055 V
最大输入电压：5.5 VJESD-30 代码：S-PQCC-N20
JESD-609代码：e4长度：3.5 mm
湿度敏感等级：2功能数量：1
输出次数：1端子数量：20
工作温度TJ-Max：125 °C工作温度TJ-Min：-40 °C
最大输出电流 1：1.5 A最大输出电压 1：3.6 V
最小输出电压 1：0.796 V封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE调节器类型：ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度：1 mm表面贴装：YES
技术：PMOS端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD宽度：3.5 mm
Base Number Matches：1

TPS74201RGRT 数据手册

 浏览型号TPS74201RGRT的Datasheet PDF文件第2页浏览型号TPS74201RGRT的Datasheet PDF文件第3页浏览型号TPS74201RGRT的Datasheet PDF文件第4页浏览型号TPS74201RGRT的Datasheet PDF文件第5页浏览型号TPS74201RGRT的Datasheet PDF文件第6页浏览型号TPS74201RGRT的Datasheet PDF文件第7页 
TPS74201  
www.ti.com  
SBVS064F–DECEMBER 2005–REVISED OCTOBER 2007  
1.5A Ultra-LDO with Programmable Soft-Start  
1
FEATURES  
2
•
Soft-Start (SS) Pin Provides a Linear Startup  
DESCRIPTION  
with Ramp Time Set by External Capacitor  
The TPS74201 low-dropout (LDO) linear regulator  
provides an easy-to-use robust power management  
•
•
1% Accuracy Over Line, Load, and  
Temperature  
solution for  
a
wide variety of applications.  
Supports Input Voltages as Low as 0.9V with  
External Bias Supply  
User-programmable soft-start minimizes stress on the  
input power source by reducing capacitive inrush  
current on start-up. The soft-start is monotonic and  
well suited for powering many different types of  
processors and ASICs. The enable input and  
power-good output allow easy sequencing with  
external regulators. This complete flexibility permits  
the user to configure a solution that will meet the  
sequencing requirements of FPGAs, DSPs, and other  
applications with special start-up requirements.  
•
•
•
•
•
Adjustable Output (0.8V to 3.6V)  
Ultra-Low Dropout: 55mV at 1.5A (typ)  
Stable with Any or No Output Capacitor  
Excellent Transient Response  
Available in 5mm × 5mm × 1mm QFN and  
DDPAK-7 Packages  
•
•
Open-Drain Power-Good (5 × 5 QFN)  
A precision reference and error amplifier deliver 1%  
accuracy over load, line, temperature, and process.  
Each LDO is stable with low-cost ceramic output  
capacitors and the device is fully specified from  
–40°C to +125°C. The TPS74201 is offered in a small  
(5mm × 5mm) QFN package, yielding a highly  
compact total solution size. For applications that  
require additional power dissipation, the DDPAK  
(KTW) package is also available.  
Active High Enable  
APPLICATIONS  
•
•
•
•
FPGA Applications  
DSP Core and I/O Voltages  
Post-Regulation Applications  
Applications with Special Start-Up Time or  
Sequencing Requirements  
•
Hot-Swap and Inrush Controls  
CSS = 0mF  
VOUT  
VIN  
CSS = 0.001mF  
IN  
PG  
CIN  
1mF  
R3  
R1  
BIAS  
EN  
SS  
CSS = 0.0047mF  
1V/div  
VOUT  
OUT  
TPS74201  
VBIAS  
COUT  
CBIAS  
1mF  
FB  
GND  
CSS  
R2  
1.2V  
VEN  
Optional  
1V/div  
0V  
Figure 1. Typical Application Circuit for the  
TPS74201 (Adjustable)  
Time (1ms/div)  
Figure 2. Turn-On Response  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2005–2007, Texas Instruments Incorporated  
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TPS74201RGRT 替代型号

型号 品牌 替代类型 描述 数据表
TPS74201RGRR TI

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 Ultra-LDO With Programmable Soft-Start

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