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TPS59641 PDF预览

TPS59641

更新时间: 2024-01-26 02:16:41
品牌 Logo 应用领域
德州仪器 - TI 控制器
页数 文件大小 规格书
54页 1760K
描述
Dual-Channel (3-Phase CPU/1-Phase GPU) SVID, D-CAP+? Step-Down Controller for

TPS59641 技术参数

生命周期:Obsolete零件包装代码:QFN
包装说明:6 X 6 MM, PLASTIC, VQFN-48针数:48
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.21
其他特性:ALSO REQUIRED 5V SUPPLY模拟集成电路 - 其他类型:DUAL SWITCHING CONTROLLER
控制模式:VOLTAGE-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:3.5 V最小输入电压:3.1 V
标称输入电压:3.3 VJESD-30 代码:S-PQCC-N48
长度:6 mm功能数量:1
端子数量:48最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE座面最大高度:1 mm
表面贴装:YES切换器配置:PHASE-SHIFT
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:0.4 mm端子位置:QUAD
宽度:6 mmBase Number Matches:1

TPS59641 数据手册

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TPS51640A, TPS59640, TPS59641  
www.ti.com  
SLUSAQ2 JANUARY 2012  
Dual-Channel (3-Phase CPU/1-Phase GPU) SVID, D-CAP+Step-Down Controller for  
IMVP-7 VCORE with Two Integrated Drivers  
1
FEATURES  
DESCRIPTION  
2
Intel IMVP-7 Serial VID (SVID) Compliant  
Supports CPU and GPU Outputs  
CPU Channel 1, 2, or 3 Phase  
Single-Phase GPU Channel  
The TPS51640A, TPS59640 and TPS59641 are  
dual-channel, fully SVID compliant IMVP-7 step-down  
controllers with two integrated gate drivers. Advanced  
control features such as D-CAP+ architecture with  
overlapping pulse support (undershoot reduction,  
USR) and overshoot reduction (OSR) provide fast  
transient response, lowest output capacitance and  
high efficiency. All of these controllers also support  
single-phase operation for light loads. The full  
compliment of IMVP-7 I/O is integrated into the  
controllers including dual PGOOD signals, ALERT  
and VR_HOT. Adjustable control of VCORE slew rate  
and voltage positioning round out the IMVP-7  
features. In addition, the controllers' CPU channel  
includes two high-current FET gate drivers to drive  
high-side and low-side N-channel FETs with  
exceptionally high speed and low switching loss. The  
TPS51601 or TPS51601A driver is used for the third  
phase of the CPU and the GPU channel.  
Full IMVP-7 Mobile Feature Set Including  
Digital Current Monitor  
8-Bit DAC with 0.250-V to 1.52-V Output Range  
Optimized Efficiency at Light and Heavy Loads  
VCORE Overshoot Reduction (OSR)  
VCORE Undershoot Reduction (USR)  
Accurate, Adjustable Voltage Positioning  
8 Independent Frequency Selections per  
Channel (CPU/GPU)  
Patent Pending AutoBalancePhase  
Balancing  
Selectable 8-Level Current Limit  
3-V to 28-V Conversion Voltage Range  
The BOOT voltage (VBOOT) on the TPS51640A and  
TPS59640 is 0 V. The TPS59641 is specifically  
designed for a VBOOT level of 1.1 V.  
Two Integrated Fast FET Drivers w/Integrated  
Boost FET  
These controllers are packaged in a space saving,  
thermally enhanced 48-pin QFN. The TPS51640A is  
rated to operate from 10°C to 105°C. The  
TPS59640 and TPS59641 are rated to operate  
from 40°C to 105°C.  
Internal Driver Bypass Mode for Use with  
DrMOS Devices  
Small 6 × 6 , 48-Pin, QFN, PowerPAD™  
Package  
APPLICATIONS  
IMVP-7 VCORE Applications for Adapter,  
Battery, NVDC or 3 V/5 V/12 V rails  
SIMPLIFIED APPLICATION  
Internal  
FET Driver  
3-phase CPU  
Controller  
TPS51601  
FET Driver  
CPU Power Stage  
VCC_CPU  
Internal  
FET Driver  
IMVP-7  
SVID Interface  
Processor  
1-phase GPU  
Controller  
TPS51601  
FET Driver  
GPU Power Stage  
VCC_GFX  
TPS51640  
UDG-11062  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
D-CAP+, PowerPAD, D-CAP are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2012, Texas Instruments Incorporated  

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