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TPS54973 PDF预览

TPS54973

更新时间: 2024-11-05 22:49:39
品牌 Logo 应用领域
德州仪器 - TI 输出元件输入元件
页数 文件大小 规格书
18页 279K
描述
3-V TO 4-V INPUT, 9-A OUTPUT SYNCHRONOUS BUCK SWITCHER WITH DISABLED SINKING DURING START-UP

TPS54973 数据手册

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Typical Size  
6,4 mm X 9,7 mm  
www.ti.com  
TPS54973  
SLVS453A FEBRUARY 2003 REVISED FEBRUARY 2005  
3-V TO 4-V INPUT, 9-A OUTPUT SYNCHRONOUS BUCK  
SWITCHER WITH DISABLED SINKING DURING START-UP  
FEATURES  
DESCRIPTION  
D
15-mMOSFET Switches for High Efficiency  
at 9-A Continuous Output Source or Sink  
Current  
As a member of the SWIFTfamily of dc/dc regulators,  
the TPS54973 low-input voltage high-output current  
synchronous buck PWM converter integrates all  
required active components. Included on the substrate  
with the listed features are a true, high performance,  
voltage error amplifier that enables maximum  
performance and flexibility in choosing the output filter  
L and C components; an undervoltage-lockout circuit to  
prevent start-up until the input voltage reaches 3 V; an  
internally or externally set slow-start circuit to limit  
in-rush currents; and a power good output useful for  
processor/logic reset, fault signaling, and supply  
sequencing.  
D
D
D
Disabled Current Sinking During Start-Up  
0.9-V to 2.5-V Adjustable Output Voltage  
Range With 1.0% Accuracy  
Wide PWM Frequency:  
Fixed 350 kHz, 550 kHz or  
Adjustable 280 kHz to 700 kHz  
D
D
D
Synchronizable to 700 kHz  
Load Protected by Peak Current Limit and  
Thermal Shutdown  
Integrated Solution Reduces Board Area and  
Component Count  
For reliable power up in output precharge applications,  
the TPS54973 is designed to only source current during  
startup.  
APPLICATIONS  
D
D
Low-Voltage, High-Density Distributed Power  
Systems  
The TPS54973 is available in a thermally enhanced  
28-pin TSSOP (PWP) PowerPADpackage, which  
eliminates bulky heatsinks. TI provides evaluation  
modules and the SWIFTdesigner software tool to aid  
in quickly achieving high-performance power supply  
designs to meet aggressive equipment development  
cycles.  
Point of Load Regulation for High  
Performance DSPs, FPGAs, ASICs and  
Microprocessors  
D
D
Broadband, Networking and Optical  
Communications Infrastructure  
Power PC Series Processors  
TYPICAL APPLICATION  
START-UP WAVEFORM  
*
*
R
L
= 1  
I/O Supply  
Core Supply  
VIN  
PH  
V
= 3.3 V  
TPS54973  
I/O  
BOOT  
PGND  
VSENSE  
VBIAS  
AGND COMP  
V
= 1.8 V  
(core)  
t Time 10 ms/div  
* Optional  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD and SWIFT are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date. Products  
conform to specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all parameters.  
Copyright © 20022003, Texas Instruments Incorporated  

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