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TPS54354

更新时间： 2024-09-18 22:49:39
品牌 Logo 应用领域
德州仪器 - TI 输出元件输入元件
页数 文件大小 规格书
28页 539K
描述
4.5V TO 20 V INPUT 3-A OUTPUT SYNCHRONOUS PWM SWITCHER WITH INTEGRATED FET

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TPS54354 数据手册

 浏览型号TPS54354的Datasheet PDF文件第2页浏览型号TPS54354的Datasheet PDF文件第3页浏览型号TPS54354的Datasheet PDF文件第4页浏览型号TPS54354的Datasheet PDF文件第5页浏览型号TPS54354的Datasheet PDF文件第6页浏览型号TPS54354的Datasheet PDF文件第7页 
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ꢃꢇ ꢎ ꢟꢟ  
www.ti.com  
SLVS519 − MAY 2004  
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FEATURES  
DESCRIPTION  
D
100 mΩ, 4.5-A Peak MOSFET Switch for High  
Efficiency at 3-A Continuous Output Current  
Uses External Lowside MOSFET or Diode  
Fixed Output Versions −  
1.2V/1.5V/1.8V/2.5V/3.3V/5.0V  
Internally Compensated for Low Parts Count  
Synchronizes to External Clock  
1805 Out of Phase Synchronization  
Wide PWM Frequency − Fixed 250 kHz,  
500 kHz or Adjustable 250 kHz to 700 kHz  
Internal Slow Start  
Load Protected by Peak Current Limit and  
Thermal Shutdown  
Adjustable Undervoltage Lockout  
The TPS5435x is a medium output current synchronous  
buck PWM converter with an integrated high side  
MOSFET and a gate driver for an optional low side  
external MOSFET. Features include a high performance  
voltage error amplifier that enables maximum  
performance under transient conditions. The TPS5435x  
has an under-voltage-lockout circuit to prevent start-up  
until the input voltage reaches a preset value; an internal  
slow-start circuit to limit in-rush currents; and a power good  
output to indicate valid output conditions. The  
synchronization feature is configurable as either an input  
or an output for easy 180° out of phase synchronization.  
D
D
D
D
D
D
D
D
The TPS5435x devices are available in a thermally  
enhanced 16-pin TSSOP (PWP) PowerPADpackage.  
TI provides evaluation modules and the SWIFTDesigner  
software tool to aid in quickly achieving high-performance  
power supply designs to meet aggressive equipment  
development cycles.  
D
D
16-Pin TSSOP PowerPADE Package  
APPLICATIONS  
D
D
D
D
Industrial & Commercial Low Power Systems  
LCD Monitors and TVs  
Computer Peripherals  
Point of Load Regulation for High  
Performance DSPs, FPGAs, ASICs and  
Microprocessors  
EFFICIENCY  
vs  
OUTPUT CURRENT  
100  
V
= 6 V  
I
95  
90  
85  
80  
75  
70  
65  
60  
V
= 12 V  
I
SIMPLIFIED SCHEMATIC  
Input  
Voltage  
TPS54356  
V = 12 V  
I
O
SYNC  
VIN  
V
= 3.3 V  
= 500 kHz  
55  
50  
f
s
PWRGD  
ENA  
0
1
2
3
4
BOOT  
PH  
I
− Output Current − A  
O
BIAS  
Output  
Voltage  
LSG  
PGND  
VSENSE  
PWRPAD  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD and SWIFT are trademarks of Texas Instruments.  
ꢁꢖ ꢍ ꢛꢑ ꢔ ꢀꢏ ꢍꢐ ꢛ ꢒꢀꢒ ꢠꢡ ꢢꢣ ꢤ ꢟꢥ ꢦꢠꢣꢡ ꢠꢧ ꢨꢩ ꢤ ꢤ ꢪꢡꢦ ꢥꢧ ꢣꢢ ꢫꢩꢬ ꢭꢠꢨ ꢥꢦꢠ ꢣꢡ ꢮꢥ ꢦꢪꢊ ꢁꢤ ꢣꢮꢩ ꢨꢦꢧ  
ꢨ ꢣꢡ ꢢꢣꢤ ꢟ ꢦꢣ ꢧ ꢫꢪ ꢨ ꢠ ꢢꢠ ꢨ ꢥ ꢦꢠ ꢣꢡꢧ ꢫ ꢪꢤ ꢦꢯꢪ ꢦꢪ ꢤ ꢟꢧ ꢣꢢ ꢀꢪꢰ ꢥꢧ ꢏꢡꢧ ꢦꢤ ꢩꢟ ꢪꢡꢦ ꢧ ꢧꢦ ꢥꢡꢮ ꢥꢤ ꢮ ꢱ ꢥꢤ ꢤ ꢥ ꢡꢦꢲꢊ  
ꢁꢤ ꢣ ꢮꢩꢨ ꢦ ꢠꢣ ꢡ ꢫꢤ ꢣ ꢨ ꢪ ꢧ ꢧ ꢠꢡ ꢳ ꢮꢣ ꢪ ꢧ ꢡꢣꢦ ꢡꢪ ꢨꢪ ꢧꢧ ꢥꢤ ꢠꢭ ꢲ ꢠꢡꢨ ꢭꢩꢮ ꢪ ꢦꢪ ꢧꢦꢠ ꢡꢳ ꢣꢢ ꢥꢭ ꢭ ꢫꢥ ꢤ ꢥꢟ ꢪꢦꢪ ꢤ ꢧꢊ  
Copyright 2004, Texas Instruments Incorporated  
1234567...28

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