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TPS1101DW PDF预览

TPS1101DW

更新时间: 2024-11-18 22:19:15
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
10页 163K
描述
SINGLE P-CHANNEL ENHANCEMENT-MODE MOSFETS

TPS1101DW 数据手册

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TPS1101, TPS1101Y  
SINGLE P-CHANNEL ENHANCEMENT-MODE MOSFETS  
SLVS079C – DECEMBER 1993 – REVISED AUGUST 1995  
D PACKAGE  
(TOP VIEW)  
Low r  
. . . 0.09 Typ at V  
= 10 V  
DS(on)  
GS  
3 V Compatible  
Requires No External V  
SOURCE  
SOURCE  
SOURCE  
GATE  
DRAIN  
DRAIN  
DRAIN  
DRAIN  
1
2
3
4
8
7
6
5
CC  
TTL and CMOS Compatible Inputs  
= 1.5 V Max  
V
GS(th)  
Available in Ultrathin TSSOP Package (PW)  
ESD Protection Up to 2 kV per  
MIL-STD-883C, Method 3015  
D PACKAGE  
description  
The TPS1101 is a single, low-r  
, P-channel,  
DS(on)  
enhancement-mode MOSFET. The device has  
been optimized for 3-V or 5-V power distribution  
in battery-powered systems by means of the  
Texas Instruments LinBiCMOS process. With a  
PW PACKAGE  
maximum V  
of 1.5 V and an I  
of only  
GS(th)  
DSS  
0.5 µA, the TPS1101 is the ideal high-side switch  
for low-voltage, portable battery-management  
systemswheremaximizingbatterylifeisaprimary  
concern. The low r  
and excellent ac  
DS(on)  
PW PACKAGE  
(TOP VIEW)  
characteristics (rise time 5.5 ns typical) of the  
TPS1101 make it the logical choice for  
low-voltage switching applications such as power  
switches for pulse-width-modulated (PWM)  
controllers or motor/bridge drivers.  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
NC  
SOURCE  
SOURCE  
SOURCE  
SOURCE  
SOURCE  
GATE  
NC  
DRAIN  
DRAIN  
DRAIN  
DRAIN  
DRAIN  
DRAIN  
NC  
The ultrathin thin shrink small-outline package or  
TSSOP (PW) version fits in height-restricted  
places where other P-channel MOSFETs cannot.  
The size advantage is especially important where  
board height restrictions do not allow for an  
small-outline integrated circuit (SOIC) package.  
Such applications include notebook computers,  
personal digital assistants (PDAs), cellular  
NC  
NC – No internal connection  
telephones, and PCMCIA cards. For existing designs, the D-packaged version has a pinout common with other  
P-channel MOSFETs in SOIC packages.  
AVAILABLE OPTIONS  
PACKAGED DEVICES  
CHIP FORM  
(Y)  
T
J
SMALL OUTLINE  
(D)  
TSSOP  
(PW)  
40°C to 150°C  
TPS1101D  
TPS1101PWLE  
TPS1101Y  
The D package is available taped and reeled. Add an R suffix to device type (e.g.,  
TPS1101DR). The PW package is only available left-end taped and reeled (indicated by  
the LE suffix on the device type; e.g., TPS1101PWLE). The chip form is tested at 25°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
LinBiCMOS is a trademark of Texas Instruments Incorporated.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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