TPL910 Series
1-A Output, High-PSRR, Low-Noise LDO Regulator
Features
Description
◼
◼
Input Voltage Range: 2.2 V to 6.5 V
Output Voltage Options:
The TPL910 series products are 1-A high-current, 24-μVRMS
low-noise, high-PSRR, high-accuracy linear regulators with only
500-mV maximum ultra-low dropout voltage at 1-A load current.
The TPL910 series products support both fixed output voltage
ranges from 0.8 V to 5 V and adjustable output voltage ranges
from 0.8 V to 5.2 V with external resistor divider.
◆
◆
Fixed Output Voltage: 0.8 V to 5 V
Adjustable Output Voltage: 0.8 V to 5.2 V
◼
3% Accuracy over Line Regulation, Load Regulation, and
Operating Temperature Range
◼
◼
◼
1 A Maximum Output Current
Low Dropout Voltage: 500 mV Maximum at 1 A
High PSRR:
Ultra-low noise, high PSRR, and high output current capability
makes the TPL910 series products ideal power supply for noise-
sensitive applications, such as high-speed communication
facilities, test and measurement devices, or high-definition
imaging equipment. Accurate output voltage tolerance, output
remote sensing, excellent transient response, and adjustable
soft-start control ensures the TPL910 series products optimal
power supply for the large-scale processors or digital loads,
such as ASIC, FPGA, CPLD and DSP.
◆
◆
65 dB at 1 kHz
50 dB at 100 kHz
◼
◼
◼
◼
◼
◼
24 μVRMS Output Voltage Noise (100 Hz to 100kHz)
Excellent Transient Response
Stable with a 10 μF or Larger Ceramic Output Capacitor
Thermal Shutdown and Over-Current Protection
Operating Junction Temperature: –40°C to +125°C
Package: 3×3 DFN-8
The TPL910 series products provide 3×3 DFN-8 package with
guaranteed operating junction temperature range (TJ) from –
40°C to +125°C.
Applications
◼
◼
◼
Wireless Communication: CPU, ASIC, FPGA, CPLD, DSP
High-Performance Analog: ADC, DAC, LVDS, VCO
Noise-Sensitive Imaging: CMOS Sensors, Video ASICs
Typical Application Schematic
CIN
VIN
VIN
EN
VOUT
VOUT
CFF
COUT
R1
Digital I/O
or VIN
TPL910
FB
R2
NR
GND
CNR
www.3peak.com
Rev.A.1
1 / 18