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TPD2E009DRYR PDF预览

TPD2E009DRYR

更新时间: 2024-11-23 07:04:43
品牌 Logo 应用领域
德州仪器 - TI 瞬态抑制器二极管光电二极管局域网
页数 文件大小 规格书
13页 920K
描述
2-CHANNEL ESD SOLUTION FOR HIGH-SPEED (6 GBPS) DIFFERENTIAL INTERFACE

TPD2E009DRYR 技术参数

是否无铅: 含铅生命周期:Obsolete
包装说明:R-PDSO-N6针数:287
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8541.10.00.50风险等级:5.78
Is Samacsys:N最小击穿电压:7 V
最大钳位电压:8 V配置:SINGLE
二极管元件材料:SILICON二极管类型:TRANS VOLTAGE SUPPRESSOR DIODE
JEDEC-95代码:MO-287UFADJESD-30 代码:R-PDSO-N6
最大非重复峰值反向功率耗散:45 W元件数量:1
端子数量:6封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
极性:UNIDIRECTIONAL认证状态:Not Qualified
最大重复峰值反向电压:5.5 V子类别:Transient Suppressors
表面贴装:YES技术:AVALANCHE
端子形式:NO LEAD端子位置:DUAL
Base Number Matches:1

TPD2E009DRYR 数据手册

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TPD2E009  
www.ti.com.............................................................................................................................................................. SLVS953AJUNE 2009REVISED JUNE 2009  
2-CHANNEL ESD SOLUTION FOR HIGH-SPEED (6 GBPS) DIFFERENTIAL INTERFACE  
1
FEATURES  
DBZ/DRT PACKAGE  
0.05-pF Matching Capacitance Between the  
Differential Signal Pair  
(TOP VIEW)  
1
D+  
D–  
Single-Pair Differential Lines to Protect the  
Differential Data and Clock Lines of the LVDS,  
SATA, Ethernet, or USB High-Speed (HS)  
Interface  
3
GND  
2
Flow-Through Pin Mapping for the High-Speed  
Lines Ensures Zero Additional Skew Due to  
Board Layout While Placing ESD-Protection  
Chip Near the Connector  
DRY PACKAGE  
(TOP VIEW)  
6
5
4
N.C.  
1
2
3
D+  
V
Supports Data Rates in Excess of 6 Gbps  
GND  
N.C
CC  
ESD Protection Meets or Exceeds  
IEC61000-4-2 (Level 4)  
D–  
5-A Peak Pulse Current (8/20 µs Pulse) for  
VBUS and D+, D–, and ID Lines  
N.C. – No internal connection  
Industrial Temperature Range: –40°C to 85°C  
Multiple Space-Saving Package Options  
APPLICATIONS  
Notebooks  
Set-Top Boxes  
DVD Players  
Media Players  
Portable Computers  
DESCRIPTION/ORDERING INFORMATION  
The TPD2E009 provides 2 ESD clamp circuits with flow-through pin mapping for ease of board layout. This  
device has been designed to protect sensitive components which are connected to ultra high-speed data and  
transmission lines. The TPD2E009 offers protection from stress caused by ESD (electrostatic discharge). This  
device also offers 5 A (8/20 µs) peak pulse current ratings per IEC 61000-4-5 (lightning) specification.  
The monolithic silicon technology allows matching between the differential signal pairs. The less than differential  
0.05-pF capacitance ensures that the differential signal distortion due to added ESD clamp remains minimal. The  
0.7-pF line capacitance is suitable for high-speed data rate (in excess of 6 Gbps).  
The TPD2E009 conforms to IEC61000-4-2 (Level 4) ESD protection. The DRT (1 mm × 1 mm) package is  
offered for space-saving portable applications. The industry standard DBZ (2.4 mm × 2.9 mm) package offers  
additional flexibility in the board layout for the system designer.  
The TPD2E009 is characterized for operation over ambient air temperature range of –40°C to 85°C.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2009, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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